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Commit 943725e5 authored by Naveen Yadav's avatar Naveen Yadav
Browse files

ARM: dts: msm: update GPUCC and DISPCC clock node and GDSC for Bengal 

Update the clock controller node and also update the GDSCs for GPUCC
and DISPCC.

Change-Id: I68a4d0bfcf69dd0d62864f3b4251a93b8efa1d13
parent 50bacb90

qcom/bengal-gdsc.dtsi

+6 −5
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ 


	/* GDSCs in DISPCC */

	mdss_core_gdsc: qcom,gdsc@5f03000 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x5f03000 0x4>;

		regulator-name = "mdss_core_gdsc";

		proxy-supply = <&mdss_core_gdsc>;
@@ -94,21 +94,22 @@ 
	};



	gpu_cx_gdsc: qcom,gdsc@599106c {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x599106c 0x4>;

		regulator-name = "gpu_cx_gdsc";

		hw-ctl-addr = <&gpu_cx_hw_ctrl>;

		hw-ctrl-addr = <&gpu_cx_hw_ctrl>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		qcom,clk-dis-wait-val = <8>;

		status = "disabled";

	};



	gpu_gx_gdsc: qcom,gdsc@599100c {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x599100c 0x4>;

		regulator-name = "gpu_gx_gdsc";

		sw-reset = <&gpu_gx_sw_reset>;

		domain-addr = <&gpu_gx_domain_addr>;

		qcom,reset-aon-logic;

		status = "disabled";

	};

};

qcom/bengal.dtsi

+10 −4
Original line number Diff line number Diff line
@@ -961,15 +961,21 @@ 
	};



	dispcc: qcom,dispcc@5f00000 {

		compatible = "qcom,dummycc";

		clock-output-names = "dispcc_clocks";

		compatible = "qcom,bengal-dispcc", "syscon";

		reg = <0x05f00000 0x20000>;

		reg-names = "cc_base";

		clock-names = "cfg_ahb_clk";

		clocks = <&gcc GCC_DISP_AHB_CLK>;

		vdd_cx-supply = <&VDD_CX_LEVEL>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	gpucc: qcom,gpucc@5990000 {

		compatible = "qcom,dummycc";

		clock-output-names = "gpucc_clocks";

		compatible = "qcom,bengal-gpucc", "syscon";

		reg = <0x5990000 0x9000>;

		reg-names = "cc_base";

		vdd_cx-supply = <&VDD_CX_LEVEL>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};