Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 93dfdf9f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

A few misc fixes for 4.16.

* 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: skip ECC for SRIOV in gmc late_init
  drm/amd/amdgpu: Correct VRAM width for APUs with GMC9
  drm/amdgpu: fix&cleanups for wb_clear
  drm/amdgpu: Correct sdma_v4 get_wptr(v2)
  drm/amd/powerplay: fix power over limit on Fiji
  drm/amdgpu:Fixed wrong emit frame size for enc
  drm/amdgpu: move WB_FREE to correct place
  drm/amdgpu: only flush hotplug work without DC
  drm/amd/display: check for ipp before calling cursor operations
parents 2679b96a fd430a70

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −1
Original line number Diff line number Diff line
@@ -1156,7 +1156,7 @@ static inline void amdgpu_set_ib_value(struct amdgpu_cs_parser *p, 
/*

 * Writeback

 */

#define AMDGPU_MAX_WB 512	/* Reserve at most 512 WB slots for amdgpu-owned rings. */

#define AMDGPU_MAX_WB 128	/* Reserve at most 128 WB slots for amdgpu-owned rings. */



struct amdgpu_wb {

	struct amdgpu_bo	*wb_obj;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+10 −7
Original line number Diff line number Diff line
@@ -492,7 +492,7 @@ static int amdgpu_device_wb_init(struct amdgpu_device *adev) 
		memset(&adev->wb.used, 0, sizeof(adev->wb.used));



		/* clear wb memory */

		memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t));

		memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t) * 8);

	}



	return 0;
@@ -530,8 +530,9 @@ int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb) 
 */

void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb)

{

	wb >>= 3;

	if (wb < adev->wb.num_wb)

		__clear_bit(wb >> 3, adev->wb.used);

		__clear_bit(wb, adev->wb.used);

}



/**
@@ -1455,11 +1456,6 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev) 
	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {

		if (!adev->ip_blocks[i].status.hw)

			continue;

		if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {

			amdgpu_free_static_csa(adev);

			amdgpu_device_wb_fini(adev);

			amdgpu_device_vram_scratch_fini(adev);

		}



		if (adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_UVD &&

			adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCE) {
@@ -1486,6 +1482,13 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev) 
	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {

		if (!adev->ip_blocks[i].status.sw)

			continue;



		if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {

			amdgpu_free_static_csa(adev);

			amdgpu_device_wb_fini(adev);

			amdgpu_device_vram_scratch_fini(adev);

		}



		r = adev->ip_blocks[i].version->funcs->sw_fini((void *)adev);

		/* XXX handle errors */

		if (r) {

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

+4 −2
Original line number Diff line number Diff line
@@ -257,6 +257,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev) 
	r = drm_irq_install(adev->ddev, adev->ddev->pdev->irq);

	if (r) {

		adev->irq.installed = false;

		if (!amdgpu_device_has_dc_support(adev))

			flush_work(&adev->hotplug_work);

		cancel_work_sync(&adev->reset_work);

		return r;
@@ -282,6 +283,7 @@ void amdgpu_irq_fini(struct amdgpu_device *adev) 
		adev->irq.installed = false;

		if (adev->irq.msi_enabled)

			pci_disable_msi(adev->pdev);

		if (!amdgpu_device_has_dc_support(adev))

			flush_work(&adev->hotplug_work);

		cancel_work_sync(&adev->reset_work);

	}

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+5 −2
Original line number Diff line number Diff line
@@ -634,7 +634,7 @@ static int gmc_v9_0_late_init(void *handle) 
	for(i = 0; i < AMDGPU_MAX_VMHUBS; ++i)

		BUG_ON(vm_inv_eng[i] > 16);



	if (adev->asic_type == CHIP_VEGA10) {

	if (adev->asic_type == CHIP_VEGA10 && !amdgpu_sriov_vf(adev)) {

		r = gmc_v9_0_ecc_available(adev);

		if (r == 1) {

			DRM_INFO("ECC is active.\n");
@@ -682,6 +682,9 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) 
	adev->mc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);

	if (!adev->mc.vram_width) {

		/* hbm memory channel size */

		if (adev->flags & AMD_IS_APU)

			chansize = 64;

		else

			chansize = 128;



		tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

+7 −11
Original line number Diff line number Diff line
@@ -238,31 +238,27 @@ static uint64_t sdma_v4_0_ring_get_rptr(struct amdgpu_ring *ring) 
static uint64_t sdma_v4_0_ring_get_wptr(struct amdgpu_ring *ring)

{

	struct amdgpu_device *adev = ring->adev;

	u64 *wptr = NULL;

	uint64_t local_wptr = 0;

	u64 wptr;



	if (ring->use_doorbell) {

		/* XXX check if swapping is necessary on BE */

		wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]);

		DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", *wptr);

		*wptr = (*wptr) >> 2;

		DRM_DEBUG("wptr/doorbell after shift == 0x%016llx\n", *wptr);

		wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs]));

		DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);

	} else {

		u32 lowbit, highbit;

		int me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1;



		wptr = &local_wptr;

		lowbit = RREG32(sdma_v4_0_get_reg_offset(adev, me, mmSDMA0_GFX_RB_WPTR)) >> 2;

		highbit = RREG32(sdma_v4_0_get_reg_offset(adev, me, mmSDMA0_GFX_RB_WPTR_HI)) >> 2;



		DRM_DEBUG("wptr [%i]high== 0x%08x low==0x%08x\n",

				me, highbit, lowbit);

		*wptr = highbit;

		*wptr = (*wptr) << 32;

		*wptr |= lowbit;

		wptr = highbit;

		wptr = wptr << 32;

		wptr |= lowbit;

	}



	return *wptr;

	return wptr >> 2;

}



/**