Pull misc2-6-36 into release branch (9354a55f) · Commits · e / devices / android_kernel_fairphone_FP4

arch/ia64/kernel/perfmon.c

+11 −11

Original line number	Diff line number	Diff line
		@@ -1696,8 +1696,8 @@ pfm_poll(struct file filp, poll_table wait)
		return mask;
		}

		static int
		pfm_ioctl(struct inode inode, struct file file, unsigned int cmd, unsigned long arg)
		static long
		pfm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
		{
		DPRINT(("pfm_ioctl called\n"));
		return -EINVAL;
		@@ -2178,7 +2178,7 @@ static const struct file_operations pfm_file_ops = {
		.read = pfm_read,
		.write = pfm_write,
		.poll = pfm_poll,
		.ioctl = pfm_ioctl,
		.unlocked_ioctl = pfm_ioctl,
		.open = pfm_no_open, /* special open code to disallow open via /proc */
		.fasync = pfm_fasync,
		.release = pfm_close,

arch/ia64/kernel/vmlinux.lds.S

+189 −173

Original line number	Diff line number	Diff line
		@@ -6,15 +6,11 @@

		#include <asm-generic/vmlinux.lds.h>

		#define IVT_TEXT \
		VMLINUX_SYMBOL(__start_ivt_text) = .; \
		*(.text..ivt) \
		VMLINUX_SYMBOL(__end_ivt_text) = .;

		OUTPUT_FORMAT("elf64-ia64-little")
		OUTPUT_ARCH(ia64)
		ENTRY(phys_start)
		jiffies = jiffies_64;

		PHDRS {
		code PT_LOAD;
		percpu PT_LOAD;
		@@ -22,10 +18,12 @@ PHDRS {
		note PT_NOTE;
		unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */
		}
		SECTIONS
		{
		/* unwind exit sections must be discarded before the rest of the
		sections get included. */

		SECTIONS {
		/*
		* unwind exit sections must be discarded before
		* the rest of the sections get included.
		*/
		/DISCARD/ : {
		*(.IA_64.unwind.exit.text)
		*(.IA_64.unwind_info.exit.text)
		@@ -36,96 +34,104 @@ SECTIONS
		v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
		phys_start = _start - LOAD_OFFSET;

		code : { } :code
		code : {
		} :code
		. = KERNEL_START;

		_text = .;
		_stext = .;

		.text : AT(ADDR(.text) - LOAD_OFFSET)
		{
		IVT_TEXT
		.text : AT(ADDR(.text) - LOAD_OFFSET) {
		__start_ivt_text = .;
		*(.text..ivt)
		__end_ivt_text = .;
		TEXT_TEXT
		SCHED_TEXT
		LOCK_TEXT
		KPROBES_TEXT
		(.gnu.linkonce.t)
		}
		.text2 : AT(ADDR(.text2) - LOAD_OFFSET)
		{ *(.text2) }

		.text2 : AT(ADDR(.text2) - LOAD_OFFSET) {
		*(.text2)
		}

		#ifdef CONFIG_SMP
		.text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET)
		{ *(.text..lock) }
		.text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) {
		*(.text..lock)
		}
		#endif
		_etext = .;

		/* Read-only data */

		/*
		* Read-only data
		*/
		NOTES :code :note /* put .notes in text and mark in PT_NOTE */
		code_continues : {} :code /* switch back to regular program... */
		code_continues : {
		} : code /* switch back to regular program... */

		EXCEPTION_TABLE(16)

		/* MCA table */
		. = ALIGN(16);
		__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
		{
		__mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) {
		__start___mca_table = .;
		*(__mca_table)
		__stop___mca_table = .;
		}

		.data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET)
		{
		.data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) {
		__start___phys_stack_reg_patchlist = .;
		*(.data..patch.phys_stack_reg)
		__end___phys_stack_reg_patchlist = .;
		}

		/* Global data */
		/*
		* Global data
		*/
		_data = .;

		/* Unwind info & table: */
		. = ALIGN(8);
		.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
		{ (.IA_64.unwind_info) }
		.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
		{
		.IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET) {
		(.IA_64.unwind_info)
		}
		.IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET) {
		__start_unwind = .;
		(.IA_64.unwind)
		__end_unwind = .;
		} :code :unwind
		code_continues2 : {} : code
		code_continues2 : {
		} : code

		RODATA

		.opd : AT(ADDR(.opd) - LOAD_OFFSET)
		{ *(.opd) }

		/* Initialization code and data: */
		.opd : AT(ADDR(.opd) - LOAD_OFFSET) {
		*(.opd)
		}

		/*
		* Initialization code and data:
		*/
		. = ALIGN(PAGE_SIZE);
		__init_begin = .;

		INIT_TEXT_SECTION(PAGE_SIZE)
		INIT_DATA_SECTION(16)

		.data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET)
		{
		.data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) {
		__start___vtop_patchlist = .;
		*(.data..patch.vtop)
		__end___vtop_patchlist = .;
		}

		.data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET)
		{
		.data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) {
		__start___rse_patchlist = .;
		*(.data..patch.rse)
		__end___rse_patchlist = .;
		}

		.data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET)
		{
		.data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) {
		__start___mckinley_e9_bundles = .;
		*(.data..patch.mckinley_e9)
		__end___mckinley_e9_bundles = .;
		@@ -133,22 +139,19 @@ SECTIONS

		#if defined(CONFIG_PARAVIRT)
		. = ALIGN(16);
		.paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET)
		{
		.paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET) {
		__start_paravirt_bundles = .;
		*(.paravirt_bundles)
		__stop_paravirt_bundles = .;
		}
		. = ALIGN(16);
		.paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET)
		{
		.paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET) {
		__start_paravirt_insts = .;
		*(.paravirt_insts)
		__stop_paravirt_insts = .;
		}
		. = ALIGN(16);
		.paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET)
		{
		.paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET) {
		__start_paravirt_branches = .;
		*(.paravirt_branches)
		__stop_paravirt_branches = .;
		@@ -158,8 +161,7 @@ SECTIONS
		#if defined(CONFIG_IA64_GENERIC)
		/* Machine Vector */
		. = ALIGN(16);
		.machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
		{
		.machvec : AT(ADDR(.machvec) - LOAD_OFFSET) {
		machvec_start = .;
		*(.machvec)
		machvec_end = .;
		@@ -175,8 +177,7 @@ SECTIONS
		. = ALIGN(PAGE_SIZE);
		__init_end = .;

		.data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET)
		{
		.data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) {
		PAGE_ALIGNED_DATA(PAGE_SIZE)
		. = ALIGN(PAGE_SIZE);
		__start_gate_section = .;
		@@ -189,21 +190,25 @@ SECTIONS
		__xen_stop_gate_section = .;
		#endif
		}
		. = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose
		/*
		* make sure the gate page doesn't expose
		* kernel data
		*/
		. = ALIGN(PAGE_SIZE);

		/* Per-cpu data: */
		. = ALIGN(PERCPU_PAGE_SIZE);
		PERCPU_VADDR(PERCPU_ADDR, :percpu)
		__phys_per_cpu_start = __per_cpu_load;
		. = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
		/*
		* ensure percpu data fits
		* into percpu page size
		*/
		. = __phys_per_cpu_start + PERCPU_PAGE_SIZE;

		data : { } :data
		.data : AT(ADDR(.data) - LOAD_OFFSET)
		{
		data : {
		} :data
		.data : AT(ADDR(.data) - LOAD_OFFSET) {
		INIT_TASK_DATA(PAGE_SIZE)
		CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES)
		READ_MOSTLY_DATA(SMP_CACHE_BYTES)
		@@ -214,21 +219,32 @@ SECTIONS
		}

		. = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
		.got : AT(ADDR(.got) - LOAD_OFFSET)
		{ (.got.plt) (.got) }
		.got : AT(ADDR(.got) - LOAD_OFFSET) {
		*(.got.plt)
		*(.got)
		}
		__gp = ADDR(.got) + 0x200000;
		/* We want the small data sections together, so single-instruction offsets
		can access them all, and initialized data all before uninitialized, so
		we can shorten the on-disk segment size. */
		.sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
		{ (.sdata) (.sdata1) *(.srdata) }

		/*
		* We want the small data sections together,
		* so single-instruction offsets can access
		* them all, and initialized data all before
		* uninitialized, so we can shorten the
		* on-disk segment size.
		*/
		.sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
		*(.sdata)
		*(.sdata1)
		*(.srdata)
		}
		_edata = .;

		BSS_SECTION(0, 0, 0)

		_end = .;

		code : { } :code
		code : {
		} :code

		STABS_DEBUG
		DWARF_DEBUG