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Commit 932e30b6 authored by Kevin Cernekee's avatar Kevin Cernekee Committed by John Crispin
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MIPS: BCM63XX: Move DMA descriptor definition into common header file 



The "IUDMA" engine used by bcm63xx_enet is also used by other blocks,
such as the USB 2.0 device.  Move the definitions into a common file so
that they do not need to be duplicated in each driver.

Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4082/


Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
parent dd89d60c

arch/mips/include/asm/mach-bcm63xx/bcm63xx_iudma.h

0 → 100644
+34 −0
Original line number Diff line number Diff line 
#ifndef BCM63XX_IUDMA_H_

#define BCM63XX_IUDMA_H_



#include <linux/types.h>



/*

 * rx/tx dma descriptor

 */

struct bcm_enet_desc {

	u32 len_stat;

	u32 address;

};



#define DMADESC_LENGTH_SHIFT	16

#define DMADESC_LENGTH_MASK	(0xfff << DMADESC_LENGTH_SHIFT)

#define DMADESC_OWNER_MASK	(1 << 15)

#define DMADESC_EOP_MASK	(1 << 14)

#define DMADESC_SOP_MASK	(1 << 13)

#define DMADESC_ESOP_MASK	(DMADESC_EOP_MASK | DMADESC_SOP_MASK)

#define DMADESC_WRAP_MASK	(1 << 12)



#define DMADESC_UNDER_MASK	(1 << 9)

#define DMADESC_APPEND_CRC	(1 << 8)

#define DMADESC_OVSIZE_MASK	(1 << 4)

#define DMADESC_RXER_MASK	(1 << 2)

#define DMADESC_CRC_MASK	(1 << 1)

#define DMADESC_OV_MASK		(1 << 0)

#define DMADESC_ERR_MASK	(DMADESC_UNDER_MASK | \

				DMADESC_OVSIZE_MASK | \

				DMADESC_RXER_MASK | \

				DMADESC_CRC_MASK | \

				DMADESC_OV_MASK)



#endif /* ! BCM63XX_IUDMA_H_ */

drivers/net/ethernet/broadcom/bcm63xx_enet.h

+1 −29
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <bcm63xx_regs.h>

#include <bcm63xx_irq.h>

#include <bcm63xx_io.h>

#include <bcm63xx_iudma.h>



/* default number of descriptor */

#define BCMENET_DEF_RX_DESC	64
@@ -30,35 +31,6 @@ 
 */

#define BCMENET_MAX_MTU		2046



/*

 * rx/tx dma descriptor

 */

struct bcm_enet_desc {

	u32 len_stat;

	u32 address;

};



#define DMADESC_LENGTH_SHIFT	16

#define DMADESC_LENGTH_MASK	(0xfff << DMADESC_LENGTH_SHIFT)

#define DMADESC_OWNER_MASK	(1 << 15)

#define DMADESC_EOP_MASK	(1 << 14)

#define DMADESC_SOP_MASK	(1 << 13)

#define DMADESC_ESOP_MASK	(DMADESC_EOP_MASK | DMADESC_SOP_MASK)

#define DMADESC_WRAP_MASK	(1 << 12)



#define DMADESC_UNDER_MASK	(1 << 9)

#define DMADESC_APPEND_CRC	(1 << 8)

#define DMADESC_OVSIZE_MASK	(1 << 4)

#define DMADESC_RXER_MASK	(1 << 2)

#define DMADESC_CRC_MASK	(1 << 1)

#define DMADESC_OV_MASK		(1 << 0)

#define DMADESC_ERR_MASK	(DMADESC_UNDER_MASK | \

				DMADESC_OVSIZE_MASK | \

				DMADESC_RXER_MASK | \

				DMADESC_CRC_MASK | \

				DMADESC_OV_MASK)





/*

 * MIB Counters register definitions

*/