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Commit 92a76f6d authored by Adam Buchbinder's avatar Adam Buchbinder Committed by Ralf Baechle
Browse files

MIPS: Fix misspellings in comments. 



Signed-off-by: default avatarAdam Buchbinder <adam.buchbinder@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: trivial@kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12617/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 091bc3a4

arch/mips/alchemy/common/dbdma.c

+2 −2
Original line number Diff line number Diff line
@@ -261,7 +261,7 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, 
	au1x_dma_chan_t *cp;



	/*

	 * We do the intialization on the first channel allocation.

	 * We do the initialization on the first channel allocation.

	 * We have to wait because of the interrupt handler initialization

	 * which can't be done successfully during board set up.

	 */
@@ -964,7 +964,7 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) 
	dp->dscr_source1 = dscr->dscr_source1;

	dp->dscr_cmd1 = dscr->dscr_cmd1;

	nbytes = dscr->dscr_cmd1;

	/* Allow the caller to specifiy if an interrupt is generated */

	/* Allow the caller to specify if an interrupt is generated */

	dp->dscr_cmd0 &= ~DSCR_CMD0_IE;

	dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;

	ctp->chan_ptr->ddma_dbell = 0;

arch/mips/cavium-octeon/executive/cvmx-interrupt-decodes.c

+7 −7
Original line number Diff line number Diff line
@@ -68,7 +68,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) 
		gmx_rx_int_en.s.pause_drp = 1;

		/* Skipping gmx_rx_int_en.s.reserved_16_18 */

		/*gmx_rx_int_en.s.ifgerr = 1; */

		/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */

		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */

		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */

		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */

		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@@ -89,7 +89,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) 
		/*gmx_rx_int_en.s.phy_spd = 1; */

		/*gmx_rx_int_en.s.phy_link = 1; */

		/*gmx_rx_int_en.s.ifgerr = 1; */

		/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */

		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */

		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */

		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */

		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@@ -112,7 +112,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) 
		/*gmx_rx_int_en.s.phy_spd = 1; */

		/*gmx_rx_int_en.s.phy_link = 1; */

		/*gmx_rx_int_en.s.ifgerr = 1; */

		/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */

		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */

		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */

		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */

		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@@ -134,7 +134,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) 
		/*gmx_rx_int_en.s.phy_spd = 1; */

		/*gmx_rx_int_en.s.phy_link = 1; */

		/*gmx_rx_int_en.s.ifgerr = 1; */

		/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */

		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */

		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */

		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */

		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@@ -156,7 +156,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) 
		/*gmx_rx_int_en.s.phy_spd = 1; */

		/*gmx_rx_int_en.s.phy_link = 1; */

		/*gmx_rx_int_en.s.ifgerr = 1; */

		/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */

		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */

		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */

		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */

		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@@ -179,7 +179,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) 
		/*gmx_rx_int_en.s.phy_spd = 1; */

		/*gmx_rx_int_en.s.phy_link = 1; */

		/*gmx_rx_int_en.s.ifgerr = 1; */

		/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */

		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */

		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */

		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */

		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@@ -209,7 +209,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) 
		gmx_rx_int_en.s.pause_drp = 1;

		/* Skipping gmx_rx_int_en.s.reserved_16_18 */

		/*gmx_rx_int_en.s.ifgerr = 1; */

		/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */

		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */

		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */

		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */

		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */

arch/mips/cavium-octeon/executive/cvmx-pko.c

+1 −1
Original line number Diff line number Diff line
@@ -189,7 +189,7 @@ void cvmx_pko_initialize_global(void) 
	/*

	 * Set the size of the PKO command buffers to an odd number of

	 * 64bit words. This allows the normal two word send to stay

	 * aligned and never span a comamnd word buffer.

	 * aligned and never span a command word buffer.

	 */

	config.u64 = 0;

	config.s.pool = CVMX_FPA_OUTPUT_BUFFER_POOL;

arch/mips/cavium-octeon/smp.c

+1 −1
Original line number Diff line number Diff line
@@ -331,7 +331,7 @@ static int octeon_update_boot_vector(unsigned int cpu) 
	}



	if (!(avail_coremask & (1 << coreid))) {

		/* core not available, assume, that catched by simple-executive */

		/* core not available, assume, that caught by simple-executive */

		cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);

		cvmx_write_csr(CVMX_CIU_PP_RST, 0);

	}

arch/mips/dec/int-handler.S

+1 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
 * Written by Ralf Baechle and Andreas Busse, modified for DECstation

 * support by Paul Antoine and Harald Koerfgen.

 *

 * completly rewritten:

 * completely rewritten:

 * Copyright (C) 1998 Harald Koerfgen

 *

 * Rewritten extensively for controller-driven IRQ support