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Commit 9254aaa0 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86/fpu: Move XCR0 manipulation to the FPU code proper



The suspend code accesses FPU state internals, add a helper for
it and isolate it.

Reviewed-by: default avatarBorislav Petkov <bp@alien8.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 84246fe4
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+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ extern void fpu__clear(struct task_struct *tsk);
extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);
extern void fpu__restore(void);
extern void fpu__init_check_bugs(void);
extern void fpu__resume_cpu(void);

extern bool irq_fpu_usable(void);

+12 −0
Original line number Diff line number Diff line
@@ -734,6 +734,18 @@ void __init_refok eager_fpu_init(void)
		setup_init_fpu_buf();
}

/*
 * Restore minimal FPU state after suspend:
 */
void fpu__resume_cpu(void)
{
	/*
	 * Restore XCR0 on xsave capable CPUs:
	 */
	if (cpu_has_xsave)
		xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
}

/*
 * Given the xsave area and a state inside, this function returns the
 * address of the state.
+2 −8
Original line number Diff line number Diff line
@@ -18,10 +18,8 @@
#include <asm/mtrr.h>
#include <asm/page.h>
#include <asm/mce.h>
#include <asm/xcr.h>
#include <asm/suspend.h>
#include <asm/debugreg.h>
#include <asm/fpu/internal.h> /* xfeatures_mask */
#include <asm/cpu.h>

#ifdef CONFIG_X86_32
@@ -155,6 +153,8 @@ static void fix_processor_context(void)
#endif
	load_TR_desc();				/* This does ltr */
	load_LDT(&current->active_mm->context);	/* This does lldt */

	fpu__resume_cpu();
}

/**
@@ -221,12 +221,6 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)
	wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
#endif

	/*
	 * restore XCR0 for xsave capable cpu's.
	 */
	if (cpu_has_xsave)
		xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);

	fix_processor_context();

	do_fpu_end();