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Commit 9205d3ce authored by Satya Durga Srinivasu Prabhala's avatar Satya Durga Srinivasu Prabhala
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trace/sched: Add NR_CPUS check for load balancer trace points 



Compilation fails for systems with NR_CPUS > 32 due to load balancer
trace points. Instead of failing compilation, add NR_CPUS checks for
these trace points which should be good enough to make sure trace points
won't even be available for such systems.

Change-Id: I0f722b32dbec999d3de31efcd135db25905604aa
Signed-off-by: default avatarSatya Durga Srinivasu Prabhala <satyap@codeaurora.org>
parent d6523f1c

include/trace/events/sched.h

+8 −4
Original line number Original line Diff line number Diff line
@@ -261,9 +261,12 @@ TRACE_EVENT(sched_migrate_task, 
 * Tracepoint for load balancing:

 * Tracepoint for load balancing:

 */

 */

#ifdef CONFIG_SMP

#ifdef CONFIG_SMP

#if NR_CPUS > 32

#if NR_CPUS > BITS_PER_LONG

#error "Unsupported NR_CPUS for lb tracepoint."

#define trace_sched_load_balance_sg_stats(...)

#endif

#define trace_sched_load_balance_stats(...)

#define trace_sched_load_balance(...)

#define trace_sched_load_balance_nohz_kick(...)

#else

TRACE_EVENT(sched_load_balance,

TRACE_EVENT(sched_load_balance,





	TP_PROTO(int cpu, enum cpu_idle_type idle, int balance,

	TP_PROTO(int cpu, enum cpu_idle_type idle, int balance,
@@ -436,7 +439,8 @@ TRACE_EVENT(sched_load_balance_stats, 
		__entry->lavg_load, __entry->llpt, __entry->sds_avg,

		__entry->lavg_load, __entry->llpt, __entry->sds_avg,

		__entry->imbalance)

		__entry->imbalance)

);

);

#endif

#endif /* NR_CPUS > BITS_PER_LONG */

#endif /* CONFIG_SMP */





DECLARE_EVENT_CLASS(sched_process_template,

DECLARE_EVENT_CLASS(sched_process_template,