Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 91d5d854 authored by Zhi Wang's avatar Zhi Wang Committed by Zhenyu Wang
Browse files

drm/i915/gvt: Move tlb_handle_pending into intel_vgpu_submission 



Move tlb_handle_pending into intel_vgpu_submssion since it belongs to a
part of vGPU submission stuffs

Signed-off-by: default avatarZhi Wang <zhi.a.wang@intel.com>
parent 1406a14b

drivers/gpu/drm/i915/gvt/gvt.h

+1 −1
Original line number Diff line number Diff line
@@ -149,6 +149,7 @@ struct intel_vgpu_submission { 
	atomic_t running_workload_num;

	struct i915_gem_context *shadow_ctx;

	DECLARE_BITMAP(shadow_ctx_desc_updated, I915_NUM_ENGINES);

	DECLARE_BITMAP(tlb_handle_pending, I915_NUM_ENGINES);

};



struct intel_vgpu {
@@ -174,7 +175,6 @@ struct intel_vgpu { 
	/* 1/2K for each reserve ring buffer */

	void *reserve_ring_buffer_va[I915_NUM_ENGINES];

	int reserve_ring_buffer_size[I915_NUM_ENGINES];

	DECLARE_BITMAP(tlb_handle_pending, I915_NUM_ENGINES);





#if IS_ENABLED(CONFIG_DRM_I915_GVT_KVMGT)

drivers/gpu/drm/i915/gvt/handlers.c

+1 −1
Original line number Diff line number Diff line
@@ -1526,7 +1526,7 @@ static int gvt_reg_tlb_control_handler(struct intel_vgpu *vgpu, 
	default:

		return -EINVAL;

	}

	set_bit(id, (void *)vgpu->tlb_handle_pending);

	set_bit(id, (void *)vgpu->submission.tlb_handle_pending);



	return 0;

}

drivers/gpu/drm/i915/gvt/render.c

+2 −1
Original line number Diff line number Diff line
@@ -147,6 +147,7 @@ static u32 gen9_render_mocs_L3[32]; 
static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id)

{

	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;

	struct intel_vgpu_submission *s = &vgpu->submission;

	enum forcewake_domains fw;

	i915_reg_t reg;

	u32 regs[] = {
@@ -160,7 +161,7 @@ static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id) 
	if (WARN_ON(ring_id >= ARRAY_SIZE(regs)))

		return;



	if (!test_and_clear_bit(ring_id, (void *)vgpu->tlb_handle_pending))

	if (!test_and_clear_bit(ring_id, (void *)s->tlb_handle_pending))

		return;



	reg = _MMIO(regs[ring_id]);

drivers/gpu/drm/i915/gvt/scheduler.c

+1 −0
Original line number Diff line number Diff line
@@ -766,6 +766,7 @@ int intel_vgpu_setup_submission(struct intel_vgpu *vgpu) 
		INIT_LIST_HEAD(&s->workload_q_head[i]);



	atomic_set(&s->running_workload_num, 0);

	bitmap_zero(s->tlb_handle_pending, I915_NUM_ENGINES);



	return 0;

drivers/gpu/drm/i915/gvt/vgpu.c

+0 −1
Original line number Diff line number Diff line
@@ -346,7 +346,6 @@ static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt, 
	vgpu->handle = param->handle;

	vgpu->gvt = gvt;

	vgpu->sched_ctl.weight = param->weight;

	bitmap_zero(vgpu->tlb_handle_pending, I915_NUM_ENGINES);



	intel_vgpu_init_cfg_space(vgpu, param->primary);