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Commit 9030e498 authored by Rahul Lakkireddy's avatar Rahul Lakkireddy Committed by David S. Miller
Browse files

cxgb4: collect TID info dump 



Signed-off-by: default avatarRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 28b44556

drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h

+39 −0
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ 
#define EDC0_FLAG 3

#define EDC1_FLAG 4



#define CUDBG_ENTITY_SIGNATURE 0xCCEDB001



struct card_mem {

	u16 size_edc0;

	u16 size_edc1;
@@ -75,6 +77,43 @@ struct cudbg_cim_pif_la { 
	u8 data[0];

};



struct cudbg_tid_info_region {

	u32 ntids;

	u32 nstids;

	u32 stid_base;

	u32 hash_base;



	u32 natids;

	u32 nftids;

	u32 ftid_base;

	u32 aftid_base;

	u32 aftid_end;



	u32 sftid_base;

	u32 nsftids;



	u32 uotid_base;

	u32 nuotids;



	u32 sb;

	u32 flags;

	u32 le_db_conf;

	u32 ip_users;

	u32 ipv6_users;



	u32 hpftid_base;

	u32 nhpftids;

};



#define CUDBG_TID_INFO_REV 1



struct cudbg_tid_info_region_rev1 {

	struct cudbg_ver_hdr ver_hdr;

	struct cudbg_tid_info_region tid;

	u32 tid_start;

	u32 reserved[16];

};



#define CUDBG_NUM_ULPTX 11

#define CUDBG_NUM_ULPTX_READ 512

drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h

+1 −0
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ enum cudbg_dbg_entity_type { 
	CUDBG_CIM_OBQ_RXQ1 = 48,

	CUDBG_PCIE_INDIRECT = 50,

	CUDBG_PM_INDIRECT = 51,

	CUDBG_TID_INFO = 54,

	CUDBG_MA_INDIRECT = 61,

	CUDBG_ULPTX_LA = 62,

	CUDBG_UP_CIM_INDIRECT = 64,

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c

+85 −0
Original line number Diff line number Diff line
@@ -902,6 +902,91 @@ int cudbg_collect_pm_indirect(struct cudbg_init *pdbg_init, 
	return rc;

}



int cudbg_collect_tid(struct cudbg_init *pdbg_init,

		      struct cudbg_buffer *dbg_buff,

		      struct cudbg_error *cudbg_err)

{

	struct adapter *padap = pdbg_init->adap;

	struct cudbg_tid_info_region_rev1 *tid1;

	struct cudbg_buffer temp_buff = { 0 };

	struct cudbg_tid_info_region *tid;

	u32 para[2], val[2];

	int rc;



	rc = cudbg_get_buff(dbg_buff, sizeof(struct cudbg_tid_info_region_rev1),

			    &temp_buff);

	if (rc)

		return rc;



	tid1 = (struct cudbg_tid_info_region_rev1 *)temp_buff.data;

	tid = &tid1->tid;

	tid1->ver_hdr.signature = CUDBG_ENTITY_SIGNATURE;

	tid1->ver_hdr.revision = CUDBG_TID_INFO_REV;

	tid1->ver_hdr.size = sizeof(struct cudbg_tid_info_region_rev1) -

			     sizeof(struct cudbg_ver_hdr);



#define FW_PARAM_PFVF_A(param) \

	(FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | \

	 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_##param) | \

	 FW_PARAMS_PARAM_Y_V(0) | \

	 FW_PARAMS_PARAM_Z_V(0))



	para[0] = FW_PARAM_PFVF_A(ETHOFLD_START);

	para[1] = FW_PARAM_PFVF_A(ETHOFLD_END);

	rc = t4_query_params(padap, padap->mbox, padap->pf, 0, 2, para, val);

	if (rc <  0) {

		cudbg_err->sys_err = rc;

		cudbg_put_buff(&temp_buff, dbg_buff);

		return rc;

	}

	tid->uotid_base = val[0];

	tid->nuotids = val[1] - val[0] + 1;



	if (is_t5(padap->params.chip)) {

		tid->sb = t4_read_reg(padap, LE_DB_SERVER_INDEX_A) / 4;

	} else if (is_t6(padap->params.chip)) {

		tid1->tid_start =

			t4_read_reg(padap, LE_DB_ACTIVE_TABLE_START_INDEX_A);

		tid->sb = t4_read_reg(padap, LE_DB_SRVR_START_INDEX_A);



		para[0] = FW_PARAM_PFVF_A(HPFILTER_START);

		para[1] = FW_PARAM_PFVF_A(HPFILTER_END);

		rc = t4_query_params(padap, padap->mbox, padap->pf, 0, 2,

				     para, val);

		if (rc < 0) {

			cudbg_err->sys_err = rc;

			cudbg_put_buff(&temp_buff, dbg_buff);

			return rc;

		}

		tid->hpftid_base = val[0];

		tid->nhpftids = val[1] - val[0] + 1;

	}



	tid->ntids = padap->tids.ntids;

	tid->nstids = padap->tids.nstids;

	tid->stid_base = padap->tids.stid_base;

	tid->hash_base = padap->tids.hash_base;



	tid->natids = padap->tids.natids;

	tid->nftids = padap->tids.nftids;

	tid->ftid_base = padap->tids.ftid_base;

	tid->aftid_base = padap->tids.aftid_base;

	tid->aftid_end = padap->tids.aftid_end;



	tid->sftid_base = padap->tids.sftid_base;

	tid->nsftids = padap->tids.nsftids;



	tid->flags = padap->flags;

	tid->le_db_conf = t4_read_reg(padap, LE_DB_CONFIG_A);

	tid->ip_users = t4_read_reg(padap, LE_DB_ACT_CNT_IPV4_A);

	tid->ipv6_users = t4_read_reg(padap, LE_DB_ACT_CNT_IPV6_A);



#undef FW_PARAM_PFVF_A



	cudbg_write_and_release_buff(&temp_buff, dbg_buff);

	return rc;

}



int cudbg_collect_ma_indirect(struct cudbg_init *pdbg_init,

			      struct cudbg_buffer *dbg_buff,

			      struct cudbg_error *cudbg_err)

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h

+3 −0
Original line number Diff line number Diff line
@@ -108,6 +108,9 @@ int cudbg_collect_pcie_indirect(struct cudbg_init *pdbg_init, 
int cudbg_collect_pm_indirect(struct cudbg_init *pdbg_init,

			      struct cudbg_buffer *dbg_buff,

			      struct cudbg_error *cudbg_err);

int cudbg_collect_tid(struct cudbg_init *pdbg_init,

		      struct cudbg_buffer *dbg_buff,

		      struct cudbg_error *cudbg_err);

int cudbg_collect_ma_indirect(struct cudbg_init *pdbg_init,

			      struct cudbg_buffer *dbg_buff,

			      struct cudbg_error *cudbg_err);

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib_common.h

+6 −0
Original line number Diff line number Diff line
@@ -57,6 +57,12 @@ struct cudbg_entity_hdr { 
	u32 reserved[5];

};



struct cudbg_ver_hdr {

	u32 signature;

	u16 revision;

	u16 size;

};



struct cudbg_buffer {

	u32 size;

	u32 offset;