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Commit 8ef74e5d authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-dt-for-v3.19' of... 

Merge tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:

* Add Add SoC-specific SATA compatible property to r8a7779
* Enable DMA for MMCIF on r8a7791 and r8a7790
* Enable USB-PHY, HS-USB and USB3.0 on r8a7791 and r8a7790
* Enable TMU timer via DT on r8a7778
* Enable CMT timer via DT on r8a73a4
* Add MMP and {SR}GX clocks to  r8a7791 and r8a7790
* Correct scifa2 clock index on r8a7740
* Add missing INTCA for irqpin on r8a7740

* tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (34 commits)
  ARM: shmobile: r8a7779 dtsi: Add SoC-specific SATA compatible property
  ARM: shmobile: r8a7791: Reference DMA channels in MMCIF DT node
  ARM: shmobile: r8a7790: Reference DMA channels in MMCIF DT nodes
  ARM: shmobile: r8a7791: Add MMCIF0 DT node
  ARM: shmobile: r8a7790: Rename mmcif node to mmc
  ARM: shmobile: r8a7778: Add SoC-specific TMU compatible property
  ARM: shmobile: r8a73a4: Add SoC-specific CMT compatible property
  ARM: shmobile: henninger: enable HS-USB
  ARM: shmobile: koelsch: enable HS-USB
  ARM: shmobile: r8a7791: add HS-USB device node
  ARM: shmobile: lager: enable HS-USB
  ARM: shmobile: r8a7790: add HS-USB device node
  ARM: shmobile: r8a7791: add USB3.0 device node
  ARM: shmobile: lager: enable USB3.0
  ARM: shmobile: r8a7790: add USB3.0 device node
  ARM: shmobile: r8a7794: Add arch_timer to device tree
  ARM: shmobile: bockw-reference: Initialise TMU device using DT
  ARM: shmobile: r8a7778: Add TMU nodes
  ARM: shmobile: armadillo800eva dts: Enable TMU0
  ARM: shmobile: r8a7740 dtsi: Add TMU0 and TMU1 device nodes
  ...

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 67ec55bc 25af9c83

arch/arm/boot/dts/r8a73a4.dtsi

+1 −1
Original line number Original line Diff line number Diff line
@@ -114,7 +114,7 @@ 
	};

	};





	cmt1: timer@e6130000 {

	cmt1: timer@e6130000 {

		compatible = "renesas,cmt-48-gen2";

		compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2";

		reg = <0 0xe6130000 0 0x1004>;

		reg = <0 0xe6130000 0 0x1004>;

		interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/r8a7740-armadillo800eva.dts

+4 −0
Original line number Original line Diff line number Diff line
@@ -299,3 +299,7 @@ 




	status = "okay";

	status = "okay";

};

};



&tmu0 {

	status = "okay";

};

arch/arm/boot/dts/r8a7740.dtsi

+39 −5
Original line number Original line Diff line number Diff line
@@ -71,6 +71,7 @@ 
			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;

	};

	};





	/* irqpin1: IRQ8 - IRQ15 */

	/* irqpin1: IRQ8 - IRQ15 */
@@ -91,6 +92,7 @@ 
			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;

	};

	};





	/* irqpin2: IRQ16 - IRQ23 */

	/* irqpin2: IRQ16 - IRQ23 */
@@ -111,6 +113,7 @@ 
			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;

	};

	};





	/* irqpin3: IRQ24 - IRQ31 */

	/* irqpin3: IRQ24 - IRQ31 */
@@ -131,6 +134,7 @@ 
			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;

	};

	};





	ether: ethernet@e9a00000 {

	ether: ethernet@e9a00000 {
@@ -193,7 +197,7 @@ 
		compatible = "renesas,scifa-r8a7740", "renesas,scifa";

		compatible = "renesas,scifa-r8a7740", "renesas,scifa";

		reg = <0xe6c60000 0x100>;

		reg = <0xe6c60000 0x100>;

		interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;

		clocks = <&mstp2_clks R8A7740_CLK_SCIFA2>;

		clock-names = "sci_ick";

		clock-names = "sci_ick";

		status = "disabled";

		status = "disabled";

	};

	};
@@ -331,6 +335,34 @@ 
		status = "disabled";

		status = "disabled";

	};

	};





	tmu0: timer@fff80000 {

		compatible = "renesas,tmu-r8a7740", "renesas,tmu";

		reg = <0xfff80000 0x2c>;

		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,

			     <0 199 IRQ_TYPE_LEVEL_HIGH>,

			     <0 200 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7740_CLK_TMU0>;

		clock-names = "fck";



		#renesas,channels = <3>;



		status = "disabled";

	};



	tmu1: timer@fff90000 {

		compatible = "renesas,tmu-r8a7740", "renesas,tmu";

		reg = <0xfff90000 0x2c>;

		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>,

			     <0 171 IRQ_TYPE_LEVEL_HIGH>,

			     <0 172 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7740_CLK_TMU1>;

		clock-names = "fck";



		#renesas,channels = <3>;



		status = "disabled";

	};



	clocks {

	clocks {

		#address-cells = <1>;

		#address-cells = <1>;

		#size-cells = <1>;

		#size-cells = <1>;
@@ -448,8 +480,8 @@ 
		mstp2_clks: mstp2_clks@e6150138 {

		mstp2_clks: mstp2_clks@e6150138 {

			compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";

			compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0xe6150138 4>, <0xe6150040 4>;

			reg = <0xe6150138 4>, <0xe6150040 4>;

			clocks = <&sub_clk>, <&sub_clk>,

			clocks = <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&sub_clk>, <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>,
@@ -458,7 +490,8 @@ 
				 <&sub_clk>;

				 <&sub_clk>;

			#clock-cells = <1>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			renesas,clock-indices = <

				R8A7740_CLK_SCIFA6 R8A7740_CLK_SCIFA7

				R8A7740_CLK_SCIFA6 R8A7740_CLK_INTCA

				R8A7740_CLK_SCIFA7

				R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2

				R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2

				R8A7740_CLK_DMAC3 R8A7740_CLK_USBDMAC

				R8A7740_CLK_DMAC3 R8A7740_CLK_USBDMAC

				R8A7740_CLK_SCIFA5 R8A7740_CLK_SCIFB

				R8A7740_CLK_SCIFA5 R8A7740_CLK_SCIFB
@@ -467,7 +500,8 @@ 
				R8A7740_CLK_SCIFA4

				R8A7740_CLK_SCIFA4

			>;

			>;

			clock-output-names =

			clock-output-names =

				"scifa6", "scifa7", "dmac1", "dmac2", "dmac3",

				"scifa6", "intca",

				"scifa7", "dmac1", "dmac2", "dmac3",

				"usbdmac", "scifa5", "scifb", "scifa0", "scifa1",

				"usbdmac", "scifa5", "scifb", "scifa0", "scifa1",

				"scifa2", "scifa3", "scifa4";

				"scifa2", "scifa3", "scifa4";

		};

		};

arch/arm/boot/dts/r8a7778-bockw-reference.dts

+4 −0
Original line number Original line Diff line number Diff line
@@ -74,6 +74,10 @@ 
	status = "okay";

	status = "okay";

};

};





&tmu0 {

	status = "okay";

};



&pfc {

&pfc {

	scif0_pins: serial0 {

	scif0_pins: serial0 {

		renesas,groups = "scif0_data_a", "scif0_ctrl";

		renesas,groups = "scif0_data_a", "scif0_ctrl";

arch/arm/boot/dts/r8a7778.dtsi

+36 −0
Original line number Original line Diff line number Diff line
@@ -162,6 +162,42 @@ 
		status = "disabled";

		status = "disabled";

	};

	};





	tmu0: timer@ffd80000 {

		compatible = "renesas,tmu-r8a7778", "renesas,tmu";

		reg = <0xffd80000 0x30>;

		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,

			     <0 33 IRQ_TYPE_LEVEL_HIGH>,

			     <0 34 IRQ_TYPE_LEVEL_HIGH>;



		#renesas,channels = <3>;



		status = "disabled";

	};



	tmu1: timer@ffd81000 {

		compatible = "renesas,tmu-r8a7778", "renesas,tmu";

		reg = <0xffd81000 0x30>;

		interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,

			     <0 37 IRQ_TYPE_LEVEL_HIGH>,

			     <0 38 IRQ_TYPE_LEVEL_HIGH>;



		#renesas,channels = <3>;



		status = "disabled";

	};



	tmu2: timer@ffd82000 {

		compatible = "renesas,tmu-r8a7778", "renesas,tmu";

		reg = <0xffd82000 0x30>;

		interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,

			     <0 41 IRQ_TYPE_LEVEL_HIGH>,

			     <0 42 IRQ_TYPE_LEVEL_HIGH>;



		#renesas,channels = <3>;



		status = "disabled";

	};



	scif0: serial@ffe40000 {

	scif0: serial@ffe40000 {

		compatible = "renesas,scif-r8a7778", "renesas,scif";

		compatible = "renesas,scif-r8a7778", "renesas,scif";

		reg = <0xffe40000 0x100>;

		reg = <0xffe40000 0x100>;