Loading drivers/gpu/msm/adreno-gpulist.h +1 −1 Original line number Original line Diff line number Diff line Loading @@ -389,7 +389,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .busy_mask = 0xFFFFFFFE, .busy_mask = 0xFFFFFFFE, .gpmufw_name = "a630_gmu.bin", .gpmufw_name = "a630_gmu.bin", .gpmu_major = 0x1, .gpmu_major = 0x1, .gpmu_minor = 0x003, .gpmu_minor = 0x007, }, }, { { .gpurev = ADRENO_REV_A640, .gpurev = ADRENO_REV_A640, Loading drivers/gpu/msm/adreno.c +3 −2 Original line number Original line Diff line number Diff line Loading @@ -619,8 +619,9 @@ static irqreturn_t adreno_irq_handler(struct kgsl_device *device) &shadow_status); &shadow_status); dev_crit_ratelimited(device->dev, dev_crit_ratelimited(device->dev, "AHB fence stuck in ISR: Shadow INT status=%8.8X\n", "Status=0x%x Unmasked status=0x%x Mask=0x%x\n", shadow_status & irq_params->mask); shadow_status & irq_params->mask, shadow_status, irq_params->mask); goto done; goto done; } } fence_retries++; fence_retries++; Loading drivers/gpu/msm/adreno_a6xx.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -59,7 +59,7 @@ static const struct adreno_vbif_platform a6xx_vbif_platforms[] = { { adreno_is_a640, a640_gbif }, { adreno_is_a640, a640_gbif }, { adreno_is_a650, a650_gbif }, { adreno_is_a650, a650_gbif }, { adreno_is_a680, a640_gbif }, { adreno_is_a680, a640_gbif }, { adreno_is_a612, a615_gbif }, { adreno_is_a612, a640_gbif }, }; }; struct kgsl_hwcg_reg { struct kgsl_hwcg_reg { Loading drivers/gpu/msm/adreno_perfcounter.c +1 −6 Original line number Original line Diff line number Diff line Loading @@ -160,6 +160,7 @@ void adreno_perfcounter_restore(struct adreno_device *adreno_dev) * Save the performance counter values before GPU power collapse. * Save the performance counter values before GPU power collapse. * The saved values are restored on restart. * The saved values are restored on restart. * This ensures physical counters are coherent across power-collapse. * This ensures physical counters are coherent across power-collapse. * This function must be called with the oob_gpu set request. */ */ inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) { { Loading @@ -170,9 +171,6 @@ inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) if (counters == NULL) if (counters == NULL) return; return; if (gmu_core_dev_oob_set(KGSL_DEVICE(adreno_dev), oob_perfcntr)) goto done; for (groupid = 0; groupid < counters->group_count; groupid++) { for (groupid = 0; groupid < counters->group_count; groupid++) { group = &(counters->groups[groupid]); group = &(counters->groups[groupid]); Loading @@ -192,9 +190,6 @@ inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) counter); counter); } } } } done: gmu_core_dev_oob_clear(KGSL_DEVICE(adreno_dev), oob_perfcntr); } } static int adreno_perfcounter_enable(struct adreno_device *adreno_dev, static int adreno_perfcounter_enable(struct adreno_device *adreno_dev, Loading Loading
drivers/gpu/msm/adreno-gpulist.h +1 −1 Original line number Original line Diff line number Diff line Loading @@ -389,7 +389,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .busy_mask = 0xFFFFFFFE, .busy_mask = 0xFFFFFFFE, .gpmufw_name = "a630_gmu.bin", .gpmufw_name = "a630_gmu.bin", .gpmu_major = 0x1, .gpmu_major = 0x1, .gpmu_minor = 0x003, .gpmu_minor = 0x007, }, }, { { .gpurev = ADRENO_REV_A640, .gpurev = ADRENO_REV_A640, Loading
drivers/gpu/msm/adreno.c +3 −2 Original line number Original line Diff line number Diff line Loading @@ -619,8 +619,9 @@ static irqreturn_t adreno_irq_handler(struct kgsl_device *device) &shadow_status); &shadow_status); dev_crit_ratelimited(device->dev, dev_crit_ratelimited(device->dev, "AHB fence stuck in ISR: Shadow INT status=%8.8X\n", "Status=0x%x Unmasked status=0x%x Mask=0x%x\n", shadow_status & irq_params->mask); shadow_status & irq_params->mask, shadow_status, irq_params->mask); goto done; goto done; } } fence_retries++; fence_retries++; Loading
drivers/gpu/msm/adreno_a6xx.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -59,7 +59,7 @@ static const struct adreno_vbif_platform a6xx_vbif_platforms[] = { { adreno_is_a640, a640_gbif }, { adreno_is_a640, a640_gbif }, { adreno_is_a650, a650_gbif }, { adreno_is_a650, a650_gbif }, { adreno_is_a680, a640_gbif }, { adreno_is_a680, a640_gbif }, { adreno_is_a612, a615_gbif }, { adreno_is_a612, a640_gbif }, }; }; struct kgsl_hwcg_reg { struct kgsl_hwcg_reg { Loading
drivers/gpu/msm/adreno_perfcounter.c +1 −6 Original line number Original line Diff line number Diff line Loading @@ -160,6 +160,7 @@ void adreno_perfcounter_restore(struct adreno_device *adreno_dev) * Save the performance counter values before GPU power collapse. * Save the performance counter values before GPU power collapse. * The saved values are restored on restart. * The saved values are restored on restart. * This ensures physical counters are coherent across power-collapse. * This ensures physical counters are coherent across power-collapse. * This function must be called with the oob_gpu set request. */ */ inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) { { Loading @@ -170,9 +171,6 @@ inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) if (counters == NULL) if (counters == NULL) return; return; if (gmu_core_dev_oob_set(KGSL_DEVICE(adreno_dev), oob_perfcntr)) goto done; for (groupid = 0; groupid < counters->group_count; groupid++) { for (groupid = 0; groupid < counters->group_count; groupid++) { group = &(counters->groups[groupid]); group = &(counters->groups[groupid]); Loading @@ -192,9 +190,6 @@ inline void adreno_perfcounter_save(struct adreno_device *adreno_dev) counter); counter); } } } } done: gmu_core_dev_oob_clear(KGSL_DEVICE(adreno_dev), oob_perfcntr); } } static int adreno_perfcounter_enable(struct adreno_device *adreno_dev, static int adreno_perfcounter_enable(struct adreno_device *adreno_dev, Loading