MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single files (8e026910) · Commits · e / devices / android_kernel_fairphone_FP4

arch/mips/alchemy/Makefile

0 → 100644

+3 −0

Original line number	Original line	Diff line number	Diff line
			obj-$(CONFIG_MIPS_GPR) += board-gpr.o
			obj-$(CONFIG_MIPS_MTX1) += board-mtx1.o
			obj-$(CONFIG_MIPS_XXS1500) += board-xxs1500.o

arch/mips/alchemy/Platform

+4 −4

Original line number	Original line	Diff line number	Diff line
	@@ -75,21 +75,21 @@ cflags-$(CONFIG_MIPS_DB1300) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
	load-$(CONFIG_MIPS_DB1300) += 0xffffffff80100000		load-$(CONFIG_MIPS_DB1300) += 0xffffffff80100000

	#		#
	# 4G-Systems eval board		# 4G-Systems MTX-1 "MeshCube" wireless router
	#		#
	platform-$(CONFIG_MIPS_MTX1) += alchemy/mtx-1/		platform-$(CONFIG_MIPS_MTX1) += alchemy/
	load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000		load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000

	#		#
	# MyCable eval board		# MyCable eval board
	#		#
	platform-$(CONFIG_MIPS_XXS1500) += alchemy/xxs1500/		platform-$(CONFIG_MIPS_XXS1500) += alchemy/
	load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000		load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000

	#		#
	# Trapeze ITS GRP board		# Trapeze ITS GRP board
	#		#
	platform-$(CONFIG_MIPS_GPR) += alchemy/gpr/		platform-$(CONFIG_MIPS_GPR) += alchemy/
	load-$(CONFIG_MIPS_GPR) += 0xffffffff80100000		load-$(CONFIG_MIPS_GPR) += 0xffffffff80100000

	# boards can specify their own <gpio.h> in one of their include dirs.		# boards can specify their own <gpio.h> in one of their include dirs.

arch/mips/alchemy/gpr/platform.c→arch/mips/alchemy/board-gpr.c

+77 −4

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* GPR board platform device registration		* GPR board platform device registration (Au1550)
	*		*
	* Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>		* Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
	*		*
	@@ -18,16 +18,89 @@
	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA		* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	*/		*/

			#include <linux/delay.h>
	#include <linux/init.h>		#include <linux/init.h>
			#include <linux/interrupt.h>
			#include <linux/kernel.h>
	#include <linux/platform_device.h>		#include <linux/platform_device.h>
			#include <linux/pm.h>
	#include <linux/mtd/partitions.h>		#include <linux/mtd/partitions.h>
	#include <linux/mtd/physmap.h>		#include <linux/mtd/physmap.h>
	#include <linux/leds.h>		#include <linux/leds.h>
	#include <linux/gpio.h>		#include <linux/gpio.h>
	#include <linux/i2c.h>		#include <linux/i2c.h>
	#include <linux/i2c-gpio.h>		#include <linux/i2c-gpio.h>
			#include <asm/bootinfo.h>
			#include <asm/reboot.h>
	#include <asm/mach-au1x00/au1000.h>		#include <asm/mach-au1x00/au1000.h>
			#include <prom.h>

			const char *get_system_type(void)
			{
			return "GPR";
			}

			void __init prom_init(void)
			{
			unsigned char *memsize_str;
			unsigned long memsize;

			prom_argc = fw_arg0;
			prom_argv = (char **)fw_arg1;
			prom_envp = (char **)fw_arg2;

			prom_init_cmdline();

			memsize_str = prom_getenv("memsize");
			if (!memsize_str)
			memsize = 0x04000000;
			else
			strict_strtoul(memsize_str, 0, &memsize);
			add_memory_region(0, memsize, BOOT_MEM_RAM);
			}

			void prom_putchar(unsigned char c)
			{
			alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
			}

			static void gpr_reset(char *c)
			{
			/* switch System-LED to orange (red# and green# on) */
			alchemy_gpio_direction_output(4, 0);
			alchemy_gpio_direction_output(5, 0);

			/* trigger watchdog to reset board in 200ms */
			printk(KERN_EMERG "Triggering watchdog soft reset...\n");
			raw_local_irq_disable();
			alchemy_gpio_direction_output(1, 0);
			udelay(1);
			alchemy_gpio_set_value(1, 1);
			while (1)
			cpu_wait();
			}

			static void gpr_power_off(void)
			{
			while (1)
			cpu_wait();
			}

			void __init board_setup(void)
			{
			printk(KERN_INFO "Trapeze ITS GPR board\n");

			pm_power_off = gpr_power_off;
			_machine_halt = gpr_power_off;
			_machine_restart = gpr_reset;

			/* Enable UART1/3 */
			alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
			alchemy_uart_enable(AU1000_UART1_PHYS_ADDR);

			/* Take away Reset of UMTS-card */
			alchemy_gpio_direction_output(215, 1);
			}

	/*		/*
	* Watchdog		* Watchdog
	@@ -184,7 +257,7 @@ static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
	else if ((slot == 0) && (pin == 2))		else if ((slot == 0) && (pin == 2))
	return AU1550_PCI_INTB;		return AU1550_PCI_INTB;

	return -1;		return 0xff;
	}		}

	static struct alchemy_pci_platdata gpr_pci_pd = {		static struct alchemy_pci_platdata gpr_pci_pd = {

arch/mips/alchemy/mtx-1/platform.c→arch/mips/alchemy/board-mtx1.c

+88 −5

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* MTX-1 platform devices registration		* MTX-1 platform devices registration (Au1500)
	*		*
	* Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>		* Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>
	*		*
	@@ -19,6 +19,8 @@
	*/		*/

	#include <linux/init.h>		#include <linux/init.h>
			#include <linux/interrupt.h>
			#include <linux/kernel.h>
	#include <linux/platform_device.h>		#include <linux/platform_device.h>
	#include <linux/leds.h>		#include <linux/leds.h>
	#include <linux/gpio.h>		#include <linux/gpio.h>
	@@ -27,8 +29,85 @@
	#include <linux/mtd/partitions.h>		#include <linux/mtd/partitions.h>
	#include <linux/mtd/physmap.h>		#include <linux/mtd/physmap.h>
	#include <mtd/mtd-abi.h>		#include <mtd/mtd-abi.h>
			#include <asm/bootinfo.h>
			#include <asm/reboot.h>
			#include <asm/mach-au1x00/au1000.h>
	#include <asm/mach-au1x00/au1xxx_eth.h>		#include <asm/mach-au1x00/au1xxx_eth.h>
			#include <prom.h>

			const char *get_system_type(void)
			{
			return "MTX-1";
			}

			void __init prom_init(void)
			{
			unsigned char *memsize_str;
			unsigned long memsize;

			prom_argc = fw_arg0;
			prom_argv = (char **)fw_arg1;
			prom_envp = (char **)fw_arg2;

			prom_init_cmdline();

			memsize_str = prom_getenv("memsize");
			if (!memsize_str)
			memsize = 0x04000000;
			else
			strict_strtoul(memsize_str, 0, &memsize);
			add_memory_region(0, memsize, BOOT_MEM_RAM);
			}

			void prom_putchar(unsigned char c)
			{
			alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
			}

			static void mtx1_reset(char *c)
			{
			/* Jump to the reset vector */
			__asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
			}

			static void mtx1_power_off(void)
			{
			while (1)
			asm volatile (
			" .set mips32 \n"
			" wait \n"
			" .set mips0 \n");
			}

			void __init board_setup(void)
			{
			#if defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
			/* Enable USB power switch */
			alchemy_gpio_direction_output(204, 0);
			#endif /* defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE) */

			/* Initialize sys_pinfunc */
			au_writel(SYS_PF_NI2, SYS_PINFUNC);

			/* Initialize GPIO */
			au_writel(~0, KSEG1ADDR(AU1000_SYS_PHYS_ADDR) + SYS_TRIOUTCLR);
			alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */
			alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */
			alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */
			alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */

			/* Enable LED and set it to green */
			alchemy_gpio_direction_output(211, 1); /* green on */
			alchemy_gpio_direction_output(212, 0); /* red off */

			pm_power_off = mtx1_power_off;
			_machine_halt = mtx1_power_off;
			_machine_restart = mtx1_reset;

			printk(KERN_INFO "4G Systems MTX-1 Board\n");
			}

			/******************************************************************************/

	static struct gpio_keys_button mtx1_gpio_button[] = {		static struct gpio_keys_button mtx1_gpio_button[] = {
	{		{
	@@ -195,7 +274,6 @@ static struct platform_device mtx1_pci_host = {
	.resource = alchemy_pci_host_res,		.resource = alchemy_pci_host_res,
	};		};


	static struct __initdata platform_device * mtx1_devs[] = {		static struct __initdata platform_device * mtx1_devs[] = {
	&mtx1_pci_host,		&mtx1_pci_host,
	&mtx1_gpio_leds,		&mtx1_gpio_leds,
	@@ -213,6 +291,12 @@ static int __init mtx1_register_devices(void)
	{		{
	int rc;		int rc;

			irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
			irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);

	au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);		au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);

	rc = gpio_request(mtx1_gpio_button[0].gpio,		rc = gpio_request(mtx1_gpio_button[0].gpio,
	@@ -226,5 +310,4 @@ static int __init mtx1_register_devices(void)
	out:		out:
	return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));		return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));
	}		}

	arch_initcall(mtx1_register_devices);		arch_initcall(mtx1_register_devices);

arch/mips/alchemy/xxs1500/platform.c→arch/mips/alchemy/board-xxs1500.c

+154 −0

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* XXS1500 board platform device registration		* BRIEF MODULE DESCRIPTION
			* MyCable XXS1500 board support
	*		*
	* Copyright (C) 2009 Manuel Lauss		* Copyright 2003, 2008 MontaVista Software Inc.
			* Author: MontaVista Software, Inc. <source@mvista.com>
	*		*
	* This program is free software; you can redistribute it and/or modify		* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License as published by		* it under the terms of the GNU General Public License as published by
	@@ -18,10 +20,85 @@
	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA		* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	*/		*/

			#include <linux/kernel.h>
	#include <linux/init.h>		#include <linux/init.h>
			#include <linux/interrupt.h>
	#include <linux/platform_device.h>		#include <linux/platform_device.h>
			#include <linux/gpio.h>
			#include <linux/delay.h>
			#include <linux/pm.h>
			#include <asm/bootinfo.h>
			#include <asm/reboot.h>
	#include <asm/mach-au1x00/au1000.h>		#include <asm/mach-au1x00/au1000.h>
			#include <prom.h>

			const char *get_system_type(void)
			{
			return "XXS1500";
			}

			void __init prom_init(void)
			{
			unsigned char *memsize_str;
			unsigned long memsize;

			prom_argc = fw_arg0;
			prom_argv = (char **)fw_arg1;
			prom_envp = (char **)fw_arg2;

			prom_init_cmdline();

			memsize_str = prom_getenv("memsize");
			if (!memsize_str \|\| strict_strtoul(memsize_str, 0, &memsize))
			memsize = 0x04000000;

			add_memory_region(0, memsize, BOOT_MEM_RAM);
			}

			void prom_putchar(unsigned char c)
			{
			alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
			}

			static void xxs1500_reset(char *c)
			{
			/* Jump to the reset vector */
			__asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
			}

			static void xxs1500_power_off(void)
			{
			while (1)
			asm volatile (
			" .set mips32 \n"
			" wait \n"
			" .set mips0 \n");
			}

			void __init board_setup(void)
			{
			u32 pin_func;

			pm_power_off = xxs1500_power_off;
			_machine_halt = xxs1500_power_off;
			_machine_restart = xxs1500_reset;

			alchemy_gpio1_input_enable();
			alchemy_gpio2_enable();

			/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
			pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
			pin_func \|= SYS_PF_UR3;
			au_writel(pin_func, SYS_PINFUNC);

			/* Enable UART */
			alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
			/* Enable DTR (MCR bit 0) = USB power up */
			__raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
			wmb();
			}

			/******************************************************************************/

	static struct resource xxs1500_pcmcia_res[] = {		static struct resource xxs1500_pcmcia_res[] = {
	{		{
	@@ -57,6 +134,20 @@ static struct platform_device *xxs1500_devs[] __initdata = {

	static int __init xxs1500_dev_init(void)		static int __init xxs1500_dev_init(void)
	{		{
			irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
			irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);

			irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
			irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
			irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);

	return platform_add_devices(xxs1500_devs,		return platform_add_devices(xxs1500_devs,
	ARRAY_SIZE(xxs1500_devs));		ARRAY_SIZE(xxs1500_devs));
	}		}