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Commit 8dfd365c authored by Pali Rohár's avatar Pali Rohár Committed by Greg Kroah-Hartman
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PCI: aardvark: Fix reading MSI interrupt number 

commit 805dfc18dd3d4dd97a987d4406593b5a225b1253 upstream.

In advk_pcie_handle_msi() it is expected that when bit i in the W1C
register PCIE_MSI_STATUS_REG is cleared, the PCIE_MSI_PAYLOAD_REG is
updated to contain the MSI number corresponding to index i.

Experiments show that this is not so, and instead PCIE_MSI_PAYLOAD_REG
always contains the number of the last received MSI, overall.

Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt
number. Since Aardvark already forbids more than 32 interrupts and uses
own allocated hwirq numbers, the msi_idx already corresponds to the
received MSI number.

Link: https://lore.kernel.org/r/20220110015018.26359-3-kabel@kernel.org


Fixes: 8c39d710 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 119016ee

drivers/pci/controller/pci-aardvark.c

+3 −7
Original line number Diff line number Diff line
@@ -1035,7 +1035,7 @@ static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie) 
static void advk_pcie_handle_msi(struct advk_pcie *pcie)

{

	u32 msi_val, msi_mask, msi_status, msi_idx;

	u16 msi_data;

	int virq;



	msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);

	msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
@@ -1045,13 +1045,9 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) 
		if (!(BIT(msi_idx) & msi_status))

			continue;



		/*

		 * msi_idx contains bits [4:0] of the msi_data and msi_data

		 * contains 16bit MSI interrupt number

		 */

		advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);

		msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK;

		generic_handle_irq(msi_data);

		virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx);

		generic_handle_irq(virq);

	}



	advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING,