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Commit 8dd32a17 authored by Camera Software Integration's avatar Camera Software Integration Committed by Gerrit - the friendly Code Review server
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Merge "msm: camera: ope: Dump debug registers in case of reset failure" into camera-kernel.lnx.3.1

parents 155a2b05 78a07400

drivers/cam_ope/ope_hw_mgr/ope_hw/top/ope_top.c

+39 −26
Original line number Diff line number Diff line
@@ -29,12 +29,27 @@ 


static struct ope_top ope_top_info;



static int cam_ope_top_dump_debug_reg(struct ope_hw *ope_hw_info)

{

	uint32_t i, val;

	struct cam_ope_top_reg *top_reg;



	top_reg = ope_hw_info->top_reg;

	for (i = 0; i < top_reg->num_debug_registers; i++) {

		val = cam_io_r_mb(top_reg->base +

			top_reg->debug_regs[i].offset);

		CAM_INFO(CAM_OPE, "Debug_status_%d val: 0x%x", i, val);

	}

	return 0;

}



static int cam_ope_top_reset(struct ope_hw *ope_hw_info,

	int32_t ctx_id, void *data)

{

	int rc = 0;

	struct cam_ope_top_reg *top_reg;

	struct cam_ope_top_reg_val *top_reg_val;

	uint32_t irq_mask, irq_status;



	if (!ope_hw_info) {

		CAM_ERR(CAM_OPE, "Invalid ope_hw_info");
@@ -59,9 +74,18 @@ static int cam_ope_top_reset(struct ope_hw *ope_hw_info, 
			&ope_top_info.reset_complete,

			msecs_to_jiffies(30));



	cam_io_w_mb(top_reg_val->debug_cfg_val,

		top_reg->base + top_reg->debug_cfg);



	if (!rc || rc < 0) {

		CAM_ERR(CAM_OPE, "reset error result = %d", rc);

		if (!rc)

		irq_mask = cam_io_r_mb(ope_hw_info->top_reg->base +

			top_reg->irq_mask);

		irq_status = cam_io_r_mb(ope_hw_info->top_reg->base +

			top_reg->irq_status);

		CAM_ERR(CAM_OPE, "irq mask 0x%x irq status 0x%x",

			irq_mask, irq_status);

		cam_ope_top_dump_debug_reg(ope_hw_info);

		rc = -ETIMEDOUT;

	} else {

		rc = 0;
@@ -70,29 +94,11 @@ static int cam_ope_top_reset(struct ope_hw *ope_hw_info, 
	/* enable interrupt mask */

	cam_io_w_mb(top_reg_val->irq_mask,

		ope_hw_info->top_reg->base + top_reg->irq_mask);

	cam_io_w_mb(top_reg_val->debug_cfg_val,

		top_reg->base + top_reg->debug_cfg);



	mutex_unlock(&ope_top_info.ope_hw_mutex);

	return rc;

}



static int cam_ope_top_dump_debug_reg(struct ope_hw *ope_hw_info)

{

	uint32_t i, val;

	struct cam_ope_top_reg *top_reg;

	struct cam_ope_top_reg_val *top_reg_val;



	top_reg = ope_hw_info->top_reg;

	top_reg_val = ope_hw_info->top_reg_val;

	for (i = 0; i < top_reg->num_debug_registers; i++) {

		val = cam_io_r_mb(top_reg->base +

			top_reg->debug_regs[i].offset);

		CAM_INFO(CAM_OPE, "Debug_status_%d val: 0x%x", i, val);

	}

	return 0;

}



static int cam_ope_top_release(struct ope_hw *ope_hw_info,

	int32_t ctx_id, void *data)

{
@@ -130,6 +136,7 @@ static int cam_ope_top_init(struct ope_hw *ope_hw_info, 
	struct cam_ope_top_reg *top_reg;

	struct cam_ope_top_reg_val *top_reg_val;

	struct cam_ope_dev_init *dev_init = data;

	uint32_t irq_mask, irq_status;



	if (!ope_hw_info) {

		CAM_ERR(CAM_OPE, "Invalid ope_hw_info");
@@ -148,7 +155,6 @@ static int cam_ope_top_init(struct ope_hw *ope_hw_info, 
	/* enable interrupt mask */

	cam_io_w_mb(top_reg_val->irq_mask,

		ope_hw_info->top_reg->base + top_reg->irq_mask);



	cam_io_w_mb(top_reg_val->sw_reset_cmd,

		ope_hw_info->top_reg->base + top_reg->reset_cmd);
@@ -156,20 +162,27 @@ static int cam_ope_top_init(struct ope_hw *ope_hw_info, 
			&ope_top_info.reset_complete,

			msecs_to_jiffies(30));



	/* enable interrupt mask */

	cam_io_w_mb(top_reg_val->irq_mask,

		ope_hw_info->top_reg->base + top_reg->irq_mask);

	cam_io_w_mb(top_reg_val->debug_cfg_val,

		top_reg->base + top_reg->debug_cfg);



	if (!rc || rc < 0) {

		CAM_ERR(CAM_OPE, "reset error result = %d", rc);

		if (!rc)

		irq_mask = cam_io_r_mb(ope_hw_info->top_reg->base +

			top_reg->irq_mask);

		irq_status = cam_io_r_mb(ope_hw_info->top_reg->base +

			top_reg->irq_status);

		CAM_ERR(CAM_OPE, "irq mask 0x%x irq status 0x%x",

			irq_mask, irq_status);

		cam_ope_top_dump_debug_reg(ope_hw_info);

		rc = -ETIMEDOUT;

	} else {

		rc = 0;

	}



	/* enable interrupt mask */

	cam_io_w_mb(top_reg_val->irq_mask,

		ope_hw_info->top_reg->base + top_reg->irq_mask);



	return rc;

}