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Commit 8c9f7aa3 authored by Viresh Kumar's avatar Viresh Kumar Committed by Vinod Koul
Browse files

dmaengine/amba-pl08x: Take flow controller info from DMA_SLAVE_CONFIG 



Flow controller information is passed now from DMA_SLAVE_CONFIG option. This
patch makes changes in pl08x driver to use device_fc from it instead of platform
data.

Signed-off-by: default avatarViresh Kumar <viresh.kumar@st.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@linux.intel.com>
parent 258aea76

drivers/dma/amba-pl08x.c

+3 −1
Original line number Diff line number Diff line
@@ -1139,6 +1139,8 @@ static int dma_set_runtime_config(struct dma_chan *chan, 
	cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT;

	cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;



	plchan->device_fc = config->device_fc;



	if (plchan->runtime_direction == DMA_DEV_TO_MEM) {

		plchan->src_addr = config->src_addr;

		plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
@@ -1370,7 +1372,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( 
		return NULL;

	}



	if (plchan->cd->device_fc)

	if (plchan->device_fc)

		tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER :

			PL080_FLOW_PER2MEM_PER;

	else

include/linux/amba/pl08x.h

+4 −4
Original line number Diff line number Diff line
@@ -47,9 +47,6 @@ enum { 
 * @muxval: a number usually used to poke into some mux regiser to

 * mux in the signal to this channel

 * @cctl_opt: default options for the channel control register

 * @device_fc: Flow Controller Settings for ccfg register. Only valid for slave

 * channels. Fill with 'true' if peripheral should be flow controller. Direction

 * will be selected at Runtime.

 * @addr: source/target address in physical memory for this DMA channel,

 * can be the address of a FIFO register for burst requests for example.

 * This can be left undefined if the PrimeCell API is used for configuring
@@ -68,7 +65,6 @@ struct pl08x_channel_data { 
	int max_signal;

	u32 muxval;

	u32 cctl;

	bool device_fc;

	dma_addr_t addr;

	bool circular_buffer;

	bool single;
@@ -183,6 +179,9 @@ enum pl08x_dma_chan_state { 
 * @host: a pointer to the host (internal use)

 * @state: whether the channel is idle, paused, running etc

 * @slave: whether this channel is a device (slave) or for memcpy

 * @device_fc: Flow Controller Settings for ccfg register. Only valid for slave

 * channels. Fill with 'true' if peripheral should be flow controller. Direction

 * will be selected at Runtime.

 * @waiting: a TX descriptor on this channel which is waiting for a physical

 * channel to become available

 */
@@ -205,6 +204,7 @@ struct pl08x_dma_chan { 
	struct pl08x_driver_data *host;

	enum pl08x_dma_chan_state state;

	bool slave;

	bool device_fc;

	struct pl08x_txd *waiting;

};