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Commit 8c6d6adc authored by Sheng Yang's avatar Sheng Yang Committed by Avi Kivity
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KVM: MMU: Move some definitions to a header file 



Move some definitions to mmu.h in order to allow building common table
entries between EPT and non-EPT.

Signed-off-by: default avatarSheng Yang <sheng.yang@intel.com>
Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent d56f546d

arch/x86/kvm/mmu.c

+0 −34
Original line number Diff line number Diff line
@@ -79,36 +79,6 @@ static int dbg = 1; 
	}

#endif



#define PT64_PT_BITS 9

#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)

#define PT32_PT_BITS 10

#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)



#define PT_WRITABLE_SHIFT 1



#define PT_PRESENT_MASK (1ULL << 0)

#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)

#define PT_USER_MASK (1ULL << 2)

#define PT_PWT_MASK (1ULL << 3)

#define PT_PCD_MASK (1ULL << 4)

#define PT_ACCESSED_MASK (1ULL << 5)

#define PT_DIRTY_MASK (1ULL << 6)

#define PT_PAGE_SIZE_MASK (1ULL << 7)

#define PT_PAT_MASK (1ULL << 7)

#define PT_GLOBAL_MASK (1ULL << 8)

#define PT64_NX_SHIFT 63

#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)



#define PT_PAT_SHIFT 7

#define PT_DIR_PAT_SHIFT 12

#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)



#define PT32_DIR_PSE36_SIZE 4

#define PT32_DIR_PSE36_SHIFT 13

#define PT32_DIR_PSE36_MASK \

	(((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)





#define PT_FIRST_AVAIL_BITS_SHIFT 9

#define PT64_SECOND_AVAIL_BITS_SHIFT 52
@@ -154,10 +124,6 @@ static int dbg = 1; 
#define PFERR_USER_MASK (1U << 2)

#define PFERR_FETCH_MASK (1U << 4)



#define PT64_ROOT_LEVEL 4

#define PT32_ROOT_LEVEL 2

#define PT32E_ROOT_LEVEL 3



#define PT_DIRECTORY_LEVEL 2

#define PT_PAGE_TABLE_LEVEL 1

arch/x86/kvm/mmu.h

+33 −0
Original line number Diff line number Diff line
@@ -9,6 +9,39 @@ 
#define TDP_ROOT_LEVEL PT32E_ROOT_LEVEL

#endif



#define PT64_PT_BITS 9

#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)

#define PT32_PT_BITS 10

#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)



#define PT_WRITABLE_SHIFT 1



#define PT_PRESENT_MASK (1ULL << 0)

#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)

#define PT_USER_MASK (1ULL << 2)

#define PT_PWT_MASK (1ULL << 3)

#define PT_PCD_MASK (1ULL << 4)

#define PT_ACCESSED_MASK (1ULL << 5)

#define PT_DIRTY_MASK (1ULL << 6)

#define PT_PAGE_SIZE_MASK (1ULL << 7)

#define PT_PAT_MASK (1ULL << 7)

#define PT_GLOBAL_MASK (1ULL << 8)

#define PT64_NX_SHIFT 63

#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)



#define PT_PAT_SHIFT 7

#define PT_DIR_PAT_SHIFT 12

#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)



#define PT32_DIR_PSE36_SIZE 4

#define PT32_DIR_PSE36_SHIFT 13

#define PT32_DIR_PSE36_MASK \

	(((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)



#define PT64_ROOT_LEVEL 4

#define PT32_ROOT_LEVEL 2

#define PT32E_ROOT_LEVEL 3



static inline void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)

{

	if (unlikely(vcpu->kvm->arch.n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))