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Commit 8c5571b9 authored by Kenneth Feng's avatar Kenneth Feng Committed by Greg Kroah-Hartman
Browse files

drm/amd/powerplay: OD setting fix on Vega10



[ Upstream commit 6d87dc97eb3341de3f7b1efa3156cb0e014f4a96 ]

gfxclk for OD setting is limited to 1980M for non-acg
ASICs of Vega10

Signed-off-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 9ad6216e
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+21 −1
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@
#include "vega10_pptable.h"

#define NUM_DSPCLK_LEVELS 8
#define VEGA10_ENGINECLOCK_HARDMAX 198000

static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
		enum phm_platform_caps cap)
@@ -258,6 +259,25 @@ static int init_over_drive_limits(
		struct pp_hwmgr *hwmgr,
		const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
{
	const ATOM_Vega10_GFXCLK_Dependency_Table *gfxclk_dep_table =
			(const ATOM_Vega10_GFXCLK_Dependency_Table *)
			(((unsigned long) powerplay_table) +
			le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset));
	bool is_acg_enabled = false;
	ATOM_Vega10_GFXCLK_Dependency_Record_V2 *patom_record_v2;

	if (gfxclk_dep_table->ucRevId == 1) {
		patom_record_v2 =
			(ATOM_Vega10_GFXCLK_Dependency_Record_V2 *)gfxclk_dep_table->entries;
		is_acg_enabled =
			(bool)patom_record_v2[gfxclk_dep_table->ucNumEntries-1].ucACGEnable;
	}

	if (powerplay_table->ulMaxODEngineClock > VEGA10_ENGINECLOCK_HARDMAX &&
		!is_acg_enabled)
		hwmgr->platform_descriptor.overdriveLimit.engineClock =
			VEGA10_ENGINECLOCK_HARDMAX;
	else
		hwmgr->platform_descriptor.overdriveLimit.engineClock =
			le32_to_cpu(powerplay_table->ulMaxODEngineClock);
	hwmgr->platform_descriptor.overdriveLimit.memoryClock =