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Commit 8c04f7a3 authored by Romain Perier's avatar Romain Perier Committed by Heiko Stuebner
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clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs 



Signed-off-by: default avatarRomain Perier <romain.perier@collabora.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 2bd6bf03

include/dt-bindings/clock/rk3368-cru.h

+1 −0
Original line number Diff line number Diff line
@@ -156,6 +156,7 @@ 
#define PCLK_ISP		366

#define PCLK_VIP		367

#define PCLK_WDT		368

#define PCLK_EFUSE256		369



/* hclk gates */

#define HCLK_SFC		448