Merge "clk: qcom: debugcc: add support for MC_CC clocks for lito" (8be8c0c3) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/clk/qcom/debugcc-lito.c

+16 −0

Original line number	Diff line number	Diff line
		@@ -245,6 +245,10 @@ static const char *const debug_mux_parent_names[] = {
		"pwrcl_clk",
		"perfcl_clk",
		"perfpcl_clk",
		"measure_only_mccc_clk",
		"measure_only_cnoc_clk",
		"measure_only_ipa_2x_clk",
		"measure_only_snoc_clk",
		};

		static struct clk_debug_mux gcc_debug_mux = {
		@@ -701,6 +705,14 @@ static struct clk_debug_mux gcc_debug_mux = {
		0x45, 0x7F, 4, 0xf, 11, 1, 0x0, 0x0, U32_MAX, 16 },
		{ "perfpcl_clk", 0xE8, 4, CPU_CC,
		0x47, 0x7F, 4, 0xf, 11, 1, 0x0, 0x0, U32_MAX, 16 },
		{ "measure_only_mccc_clk", 0xC2, 1, MC_CC,
		0xC2, 0x3FF, 0, 0xF, 0, 1, 0x62008, 0x62000, 0x62004 },
		{ "measure_only_cnoc_clk", 0x15, 1, GCC,
		0x15, 0x3FF, 0, 0xF, 0, 1, 0x62008, 0x62000, 0x62004 },
		{ "measure_only_ipa_2x_clk", 0x128, 1, GCC,
		0x128, 0x3FF, 0, 0xF, 0, 1, 0x62008, 0x62000, 0x62004 },
		{ "measure_only_snoc_clk", 0x7, 1, GCC,
		0x7, 0x3FF, 0, 0xF, 0, 1, 0x62008, 0x62000, 0x62004 },
		),
		.hw.init = &(struct clk_init_data){
		.name = "gcc_debug_mux",
		@@ -779,6 +791,10 @@ static int clk_debug_lito_probe(struct platform_device *pdev)
		if (ret)
		return ret;

		ret = map_debug_bases(pdev, "qcom,mccc", MC_CC);
		if (ret)
		return ret;

		clk = devm_clk_register(&pdev->dev, &gcc_debug_mux.hw);
		if (IS_ERR(clk)) {
		dev_err(&pdev->dev, "Unable to register GCC debug mux\n");

+42 −0

Original line number	Diff line number	Diff line
		@@ -2386,11 +2386,53 @@ static struct clk_dummy perfpcl_clk = {
		.ops = &clk_dummy_ops,
		},
		};

		/* Measure-only clock for ddrss_gcc_debug_clk. */
		static struct clk_dummy measure_only_mccc_clk = {
		.rrate = 1000,
		.hw.init = &(struct clk_init_data){
		.name = "measure_only_mccc_clk",
		.ops = &clk_dummy_ops,
		},
		};


		/* Measure-only clock for gcc_cfg_noc_ahb_clk. */
		static struct clk_dummy measure_only_cnoc_clk = {
		.rrate = 1000,
		.hw.init = &(struct clk_init_data){
		.name = "measure_only_cnoc_clk",
		.ops = &clk_dummy_ops,
		},
		};

		/* Measure-only clock for gcc_ipa_2x_clk. */
		static struct clk_dummy measure_only_ipa_2x_clk = {
		.rrate = 1000,
		.hw.init = &(struct clk_init_data){
		.name = "measure_only_ipa_2x_clk",
		.ops = &clk_dummy_ops,
		},
		};

		/* Measure-only clock for gcc_sys_noc_axi_clk. */
		static struct clk_dummy measure_only_snoc_clk = {
		.rrate = 1000,
		.hw.init = &(struct clk_init_data){
		.name = "measure_only_snoc_clk",
		.ops = &clk_dummy_ops,
		},
		};

		static struct clk_hw *gcc_lito_hws[] = {
		&l3_clk.hw,
		&pwrcl_clk.hw,
		&perfcl_clk.hw,
		&perfpcl_clk.hw,
		&measure_only_mccc_clk.hw,
		&measure_only_cnoc_clk.hw,
		&measure_only_ipa_2x_clk.hw,
		&measure_only_snoc_clk.hw,
		};

		static struct clk_regmap *gcc_lito_clocks[] = {