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Commit 8b95aa2c authored by Sagi Grimberg's avatar Sagi Grimberg Committed by Doug Ledford
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IB/iser: Make fastreg pool cache friendly 



Memory regions are resources that are saved
in the device caches. Increase the probability for
a cache hit by adding the MRU descriptor to pool
head.

Signed-off-by: default avatarSagi Grimberg <sagig@mellanox.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent 4dec2a27

drivers/infiniband/ulp/iser/iser_memory.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -63,7 +63,7 @@ iser_reg_desc_put(struct ib_conn *ib_conn, 
	unsigned long flags;

	unsigned long flags;





	spin_lock_irqsave(&ib_conn->lock, flags);

	spin_lock_irqsave(&ib_conn->lock, flags);

	list_add_tail(&desc->list, &ib_conn->fastreg.pool);

	list_add(&desc->list, &ib_conn->fastreg.pool);

	spin_unlock_irqrestore(&ib_conn->lock, flags);

	spin_unlock_irqrestore(&ib_conn->lock, flags);

}

}