Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8b3c8ba3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC late changes from Olof Johansson:
 "We were expecting to sit on this branch through most of the merge
  window since the contents was merged into our tree late, but we ended
  up sitting on all of our contents so it can go in with the rest.

  The contents here is:

   - a large branch of cleanups of the CM/PRM blocks on OMAP.

   - a couple of patches plumbing up CM/PRM on OMAP5 and DRA7.

   - a branch with DT updates for Freescale i.MX.  including some
     shuffling from .dts to .dtsi (include) files that causes a little
     churn"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits)
  ARM: OMAP2+: Fix booting with configs that don't have MFD_SYSCON
  ARM: OMAP4+: control: add support for initializing control module via DT
  ARM: dts: dra7: add minimal l4 bus layout with control module support
  ARM: dts: omap5: add minimal l4 bus layout with control module support
  ARM: OMAP4+: control: remove support for legacy pad read/write
  ARM: OMAP4: display: convert display to use syscon for dsi muxing
  ARM: dts: omap4: add minimal l4 bus layout with control module support
  ARM: dts: am4372: add minimal l4 bus layout with control module support
  ARM: dts: am43xx-epos-evm: fix pinmux node layout
  ARM: dts: am33xx: add minimal l4 bus layout with control module support
  ARM: dts: omap3: add minimal l4 bus layout with control module support
  ARM: dts: omap24xx: add minimal l4 bus layout with control module support
  ARM: OMAP2+: control: add syscon support for register accesses
  ARM: OMAP2+: id: cache omap_type value
  ARM: OMAP2+: control: remove API for getting control module base address
  ARM: OMAP2+: clock: add low-level support for regmap
  ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init
  ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags
  ARM: OMAP2+: CM: move SoC specific init calls within a generic API
  ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility
  ...
parents d34dc4f9 48c10785

Documentation/devicetree/bindings/arm/omap/ctrl.txt

0 → 100644
+79 −0
Original line number Diff line number Diff line 
OMAP Control Module bindings



Control Module contains miscellaneous features under it based on SoC type.

Pincontrol is one common feature, and it has a specialized support

described in [1]. Typically some clock nodes are also under control module.

Syscon is used to share register level access to drivers external to

control module driver itself.



See [2] for documentation about clock/clockdomain nodes.



[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt

[2] Documentation/devicetree/bindings/clock/ti/*



Required properties:

- compatible:	Must be one of:

		"ti,am3-scm"

		"ti,am4-scm"

		"ti,dm814-scrm"

		"ti,dm816-scrm"

		"ti,omap2-scm"

		"ti,omap3-scm"

		"ti,omap4-scm-core"

		"ti,omap4-scm-padconf-core"

		"ti,omap5-scm-core"

		"ti,omap5-scm-padconf-core"

		"ti,dra7-scm-core"

- reg:		Contains Control Module register address range

		(base address and length)



Optional properties:

- clocks:	clocks for this module

- clockdomains:	clockdomains for this module



Examples:



scm: scm@2000 {

	compatible = "ti,omap3-scm", "simple-bus";

	reg = <0x2000 0x2000>;

	#address-cells = <1>;

	#size-cells = <1>;

	ranges = <0 0x2000 0x2000>;



	omap3_pmx_core: pinmux@30 {

		compatible = "ti,omap3-padconf",

			     "pinctrl-single";

		reg = <0x30 0x230>;

		#address-cells = <1>;

		#size-cells = <0>;

		#interrupt-cells = <1>;

		interrupt-controller;

		pinctrl-single,register-width = <16>;

		pinctrl-single,function-mask = <0xff1f>;

	};



	scm_conf: scm_conf@270 {

		compatible = "syscon";

		reg = <0x270 0x330>;

		#address-cells = <1>;

		#size-cells = <1>;



		scm_clocks: clocks {

			#address-cells = <1>;

			#size-cells = <0>;

		};

	};



	scm_clockdomains: clockdomains {

	};

}



&scm_clocks {

	mcbsp5_mux_fck: mcbsp5_mux_fck {

		#clock-cells = <0>;

		compatible = "ti,composite-mux-clock";

		clocks = <&core_96m_fck>, <&mcbsp_clks>;

		ti,bit-shift = <4>;

		reg = <0x02d8>;

	};

};

Documentation/devicetree/bindings/arm/omap/l4.txt

0 → 100644
+26 −0
Original line number Diff line number Diff line 
L4 interconnect bindings



These bindings describe the OMAP SoCs L4 interconnect bus.



Required properties:

- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus

	       Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus

	       Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus

	       Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus

	       Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus

	       Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus

	       Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus

	       Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus

	       Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus

	       Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus

	       Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus

- ranges : contains the IO map range for the bus



Examples:



l4: l4@48000000 {

	compatible "ti,omap2-l4", "simple-bus";

	#address-cells = <1>;

	#size-cells = <1>;

	ranges = <0 0x48000000 0x100000>;

};

Documentation/devicetree/bindings/arm/omap/prcm.txt

+2 −4
Original line number Diff line number Diff line
@@ -10,14 +10,10 @@ documentation about the individual clock/clockdomain nodes. 
Required properties:

- compatible:	Must be one of:

		"ti,am3-prcm"

		"ti,am3-scrm"

		"ti,am4-prcm"

		"ti,am4-scrm"

		"ti,omap2-prcm"

		"ti,omap2-scrm"

		"ti,omap3-prm"

		"ti,omap3-cm"

		"ti,omap3-scrm"

		"ti,omap4-cm1"

		"ti,omap4-prm"

		"ti,omap4-cm2"
@@ -29,6 +25,8 @@ Required properties: 
		"ti,dra7-prm"

		"ti,dra7-cm-core-aon"

		"ti,dra7-cm-core"

		"ti,dm814-prcm"

		"ti,dm816-prcm"

- reg:		Contains PRCM module register address range

		(base address and length)

- clocks:	clocks for this module

arch/arm/boot/dts/Makefile

+3 −1
Original line number Diff line number Diff line
@@ -307,9 +307,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ 
	imx6q-wandboard.dtb \

	imx6q-wandboard-revb1.dtb

dtb-$(CONFIG_SOC_IMX6SL) += \

	imx6sl-evk.dtb

	imx6sl-evk.dtb \

	imx6sl-warp.dtb

dtb-$(CONFIG_SOC_IMX6SX) += \

	imx6sx-sabreauto.dtb \

	imx6sx-sdb-reva.dtb \

	imx6sx-sdb.dtb

dtb-$(CONFIG_SOC_LS1021A) += \

	ls1021a-qds.dtb \

arch/arm/boot/dts/am33xx-clocks.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ 
 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

&scrm_clocks {

&scm_clocks {

	sys_clkin_ck: sys_clkin_ck {

		#clock-cells = <0>;

		compatible = "ti,mux-clock";