Loading asoc/codecs/bolero/rx-macro.c +2 −1 Original line number Original line Diff line number Diff line Loading @@ -2590,6 +2590,7 @@ static void rx_macro_hphdelay_lutbypass(struct snd_soc_component *component, } } if (hph_lut_bypass_reg && SND_SOC_DAPM_EVENT_OFF(event)) { if (hph_lut_bypass_reg && SND_SOC_DAPM_EVENT_OFF(event)) { if (!rx_priv->is_ear_mode_on) snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, BOLERO_CDC_RX_RX0_RX_PATH_CFG1, BOLERO_CDC_RX_RX0_RX_PATH_CFG1, 0x02, 0x00); 0x02, 0x00); Loading asoc/codecs/wcd937x/wcd937x.c +35 −13 Original line number Original line Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only /* /* * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ */ #include <linux/module.h> #include <linux/module.h> Loading Loading @@ -49,6 +50,8 @@ enum { HPH_COMP_DELAY, HPH_COMP_DELAY, HPH_PA_DELAY, HPH_PA_DELAY, AMIC2_BCS_ENABLE, AMIC2_BCS_ENABLE, WCD_HPHL_EN, WCD_EAR_EN, }; }; static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1); static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1); Loading Loading @@ -834,6 +837,7 @@ static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, set_bit(HPH_PA_DELAY, &wcd937x->status_mask); set_bit(HPH_PA_DELAY, &wcd937x->status_mask); snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13); WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13); set_bit(WCD_HPHL_EN, &wcd937x->status_mask); break; break; case SND_SOC_DAPM_POST_PMU: case SND_SOC_DAPM_POST_PMU: /* /* Loading Loading @@ -864,12 +868,14 @@ static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); break; break; case SND_SOC_DAPM_PRE_PMD: case SND_SOC_DAPM_PRE_PMD: if (!test_bit(WCD_EAR_EN, &wcd937x->status_mask)) { wcd_disable_irq(&wcd937x->irq_info, wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); if (wcd937x->update_wcd_event) if (wcd937x->update_wcd_event) wcd937x->update_wcd_event(wcd937x->handle, wcd937x->update_wcd_event(wcd937x->handle, WCD_BOLERO_EVT_RX_MUTE, WCD_BOLERO_EVT_RX_MUTE, (WCD_RX1 << 0x10 | 0x1)); (WCD_RX1 << 0x10 | 0x1)); } blocking_notifier_call_chain(&wcd937x->mbhc->notifier, blocking_notifier_call_chain(&wcd937x->mbhc->notifier, WCD_EVENT_PRE_HPHL_PA_OFF, WCD_EVENT_PRE_HPHL_PA_OFF, &wcd937x->mbhc->wcd_mbhc); &wcd937x->mbhc->wcd_mbhc); Loading Loading @@ -900,6 +906,7 @@ static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, WCD_CLSH_EVENT_POST_PA, WCD_CLSH_EVENT_POST_PA, WCD_CLSH_STATE_HPHL, WCD_CLSH_STATE_HPHL, hph_mode); hph_mode); clear_bit(WCD_HPHL_EN, &wcd937x->status_mask); break; break; }; }; return ret; return ret; Loading Loading @@ -988,10 +995,12 @@ static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL2, WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x05); 0x05, 0x05); else else { snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL0, WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13); 0x17, 0x13); set_bit(WCD_EAR_EN, &wcd937x->status_mask); } if (!wcd937x->comp1_enable) if (!wcd937x->comp1_enable) snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x80); WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x80); Loading @@ -1014,16 +1023,24 @@ static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); break; break; case SND_SOC_DAPM_PRE_PMD: case SND_SOC_DAPM_PRE_PMD: if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX) if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX) { wcd_disable_irq(&wcd937x->irq_info, wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT); WCD937X_IRQ_AUX_PDM_WD_INT); else if (wcd937x->update_wcd_event) wcd937x->update_wcd_event(wcd937x->handle, WCD_BOLERO_EVT_RX_MUTE, (WCD_RX1 << 0x10 | 0x1)); } else { if(!test_bit(WCD_HPHL_EN, &wcd937x->status_mask)) { wcd_disable_irq(&wcd937x->irq_info, wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); if (wcd937x->update_wcd_event) if (wcd937x->update_wcd_event) wcd937x->update_wcd_event(wcd937x->handle, wcd937x->update_wcd_event(wcd937x->handle, WCD_BOLERO_EVT_RX_MUTE, WCD_BOLERO_EVT_RX_MUTE, (WCD_RX1 << 0x10 | 0x1)); (WCD_RX1 << 0x10 | 0x1)); } } break; break; case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD: if (!wcd937x->comp1_enable) if (!wcd937x->comp1_enable) Loading @@ -1040,10 +1057,12 @@ static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL2, WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x00); 0x05, 0x00); else else { snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL0, WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x00); 0x17, 0x00); clear_bit(WCD_EAR_EN, &wcd937x->status_mask); } usleep_range(10000, 10010); usleep_range(10000, 10010); /* disable EAR CnP FSM */ /* disable EAR CnP FSM */ snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, Loading Loading @@ -1109,6 +1128,8 @@ static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w, wcd937x_rx_connect_port(component, COMP_L, true); wcd937x_rx_connect_port(component, COMP_L, true); break; break; case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD: if (!test_bit(WCD_HPHL_EN, &wcd937x->status_mask) && !test_bit(WCD_EAR_EN, &wcd937x->status_mask)) { wcd937x_rx_connect_port(component, HPH_L, false); wcd937x_rx_connect_port(component, HPH_L, false); if (wcd937x->comp1_enable) if (wcd937x->comp1_enable) wcd937x_rx_connect_port(component, COMP_L, false); wcd937x_rx_connect_port(component, COMP_L, false); Loading @@ -1116,6 +1137,7 @@ static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x01, 0x00); 0x01, 0x00); } break; break; }; }; return 0; return 0; Loading asoc/msm-audio-effects-q6-v2.c +9 −0 Original line number Original line Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ */ #include <linux/slab.h> #include <linux/slab.h> Loading Loading @@ -1002,6 +1003,14 @@ int msm_audio_effects_pbe_handler(struct audio_client *ac, pbe->config.reserved = pbe->config.reserved = GET_NEXT(values, param_max_offset, rc); GET_NEXT(values, param_max_offset, rc); if ((pbe->config.bandpass_filter_order > 3) || (pbe->config.bandpass_filter_order < 1)) { pr_err("%s: Invalid BPF order\n", __func__); rc = -EINVAL; goto invalid_config; } p_coeffs = &pbe->config.p1LowPassCoeffs[0]; p_coeffs = &pbe->config.p1LowPassCoeffs[0]; lpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; lpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; hpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; hpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; Loading dsp/q6afe.c +14 −0 Original line number Original line Diff line number Diff line Loading @@ -9974,6 +9974,7 @@ static int afe_spv4_get_calib_data( struct param_hdr_v3 param_hdr; struct param_hdr_v3 param_hdr; int port = SLIMBUS_4_TX; int port = SLIMBUS_4_TX; int ret = -EINVAL; int ret = -EINVAL; uint32_t th_vi_ca_state; if (!calib_resp) { if (!calib_resp) { pr_err("%s: Invalid params\n", __func__); pr_err("%s: Invalid params\n", __func__); Loading @@ -9995,6 +9996,12 @@ static int afe_spv4_get_calib_data( __func__, port, param_hdr.param_id, ret); __func__, port, param_hdr.param_id, ret); goto get_params_fail; goto get_params_fail; } } th_vi_ca_state = this_afe.spv4_calib_data.res_cfg.th_vi_ca_state; if (th_vi_ca_state < FBSP_INCORRECT_OP_MODE || th_vi_ca_state > MAX_FBSP_STATE) { pr_err("%s: invalid fbsp state %d\n", __func__, th_vi_ca_state); goto get_params_fail; } memcpy(&calib_resp->res_cfg, &this_afe.spv4_calib_data.res_cfg, memcpy(&calib_resp->res_cfg, &this_afe.spv4_calib_data.res_cfg, sizeof(this_afe.calib_data.res_cfg)); sizeof(this_afe.calib_data.res_cfg)); pr_info("%s: state %s resistance %d %d\n", __func__, pr_info("%s: state %s resistance %d %d\n", __func__, Loading @@ -10013,6 +10020,7 @@ int afe_spk_prot_get_calib_data(struct afe_spkr_prot_get_vi_calib *calib_resp) struct param_hdr_v3 param_hdr; struct param_hdr_v3 param_hdr; int port = SLIMBUS_4_TX; int port = SLIMBUS_4_TX; int ret = -EINVAL; int ret = -EINVAL; uint32_t th_vi_ca_state; if (!calib_resp) { if (!calib_resp) { pr_err("%s: Invalid params\n", __func__); pr_err("%s: Invalid params\n", __func__); Loading @@ -10034,6 +10042,12 @@ int afe_spk_prot_get_calib_data(struct afe_spkr_prot_get_vi_calib *calib_resp) __func__, port, param_hdr.param_id, ret); __func__, port, param_hdr.param_id, ret); goto get_params_fail; goto get_params_fail; } } th_vi_ca_state = this_afe.calib_data.res_cfg.th_vi_ca_state; if (th_vi_ca_state < FBSP_INCORRECT_OP_MODE || th_vi_ca_state > MAX_FBSP_STATE) { pr_err("%s: invalid fbsp state %d\n", __func__, th_vi_ca_state); goto get_params_fail; } memcpy(&calib_resp->res_cfg, &this_afe.calib_data.res_cfg, memcpy(&calib_resp->res_cfg, &this_afe.calib_data.res_cfg, sizeof(this_afe.calib_data.res_cfg)); sizeof(this_afe.calib_data.res_cfg)); pr_info("%s: state %s resistance %d %d\n", __func__, pr_info("%s: state %s resistance %d %d\n", __func__, Loading Loading
asoc/codecs/bolero/rx-macro.c +2 −1 Original line number Original line Diff line number Diff line Loading @@ -2590,6 +2590,7 @@ static void rx_macro_hphdelay_lutbypass(struct snd_soc_component *component, } } if (hph_lut_bypass_reg && SND_SOC_DAPM_EVENT_OFF(event)) { if (hph_lut_bypass_reg && SND_SOC_DAPM_EVENT_OFF(event)) { if (!rx_priv->is_ear_mode_on) snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, BOLERO_CDC_RX_RX0_RX_PATH_CFG1, BOLERO_CDC_RX_RX0_RX_PATH_CFG1, 0x02, 0x00); 0x02, 0x00); Loading
asoc/codecs/wcd937x/wcd937x.c +35 −13 Original line number Original line Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only /* /* * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ */ #include <linux/module.h> #include <linux/module.h> Loading Loading @@ -49,6 +50,8 @@ enum { HPH_COMP_DELAY, HPH_COMP_DELAY, HPH_PA_DELAY, HPH_PA_DELAY, AMIC2_BCS_ENABLE, AMIC2_BCS_ENABLE, WCD_HPHL_EN, WCD_EAR_EN, }; }; static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1); static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1); Loading Loading @@ -834,6 +837,7 @@ static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, set_bit(HPH_PA_DELAY, &wcd937x->status_mask); set_bit(HPH_PA_DELAY, &wcd937x->status_mask); snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13); WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13); set_bit(WCD_HPHL_EN, &wcd937x->status_mask); break; break; case SND_SOC_DAPM_POST_PMU: case SND_SOC_DAPM_POST_PMU: /* /* Loading Loading @@ -864,12 +868,14 @@ static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); break; break; case SND_SOC_DAPM_PRE_PMD: case SND_SOC_DAPM_PRE_PMD: if (!test_bit(WCD_EAR_EN, &wcd937x->status_mask)) { wcd_disable_irq(&wcd937x->irq_info, wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); if (wcd937x->update_wcd_event) if (wcd937x->update_wcd_event) wcd937x->update_wcd_event(wcd937x->handle, wcd937x->update_wcd_event(wcd937x->handle, WCD_BOLERO_EVT_RX_MUTE, WCD_BOLERO_EVT_RX_MUTE, (WCD_RX1 << 0x10 | 0x1)); (WCD_RX1 << 0x10 | 0x1)); } blocking_notifier_call_chain(&wcd937x->mbhc->notifier, blocking_notifier_call_chain(&wcd937x->mbhc->notifier, WCD_EVENT_PRE_HPHL_PA_OFF, WCD_EVENT_PRE_HPHL_PA_OFF, &wcd937x->mbhc->wcd_mbhc); &wcd937x->mbhc->wcd_mbhc); Loading Loading @@ -900,6 +906,7 @@ static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, WCD_CLSH_EVENT_POST_PA, WCD_CLSH_EVENT_POST_PA, WCD_CLSH_STATE_HPHL, WCD_CLSH_STATE_HPHL, hph_mode); hph_mode); clear_bit(WCD_HPHL_EN, &wcd937x->status_mask); break; break; }; }; return ret; return ret; Loading Loading @@ -988,10 +995,12 @@ static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL2, WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x05); 0x05, 0x05); else else { snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL0, WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13); 0x17, 0x13); set_bit(WCD_EAR_EN, &wcd937x->status_mask); } if (!wcd937x->comp1_enable) if (!wcd937x->comp1_enable) snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x80); WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x80); Loading @@ -1014,16 +1023,24 @@ static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); break; break; case SND_SOC_DAPM_PRE_PMD: case SND_SOC_DAPM_PRE_PMD: if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX) if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX) { wcd_disable_irq(&wcd937x->irq_info, wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT); WCD937X_IRQ_AUX_PDM_WD_INT); else if (wcd937x->update_wcd_event) wcd937x->update_wcd_event(wcd937x->handle, WCD_BOLERO_EVT_RX_MUTE, (WCD_RX1 << 0x10 | 0x1)); } else { if(!test_bit(WCD_HPHL_EN, &wcd937x->status_mask)) { wcd_disable_irq(&wcd937x->irq_info, wcd_disable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT); WCD937X_IRQ_HPHL_PDM_WD_INT); if (wcd937x->update_wcd_event) if (wcd937x->update_wcd_event) wcd937x->update_wcd_event(wcd937x->handle, wcd937x->update_wcd_event(wcd937x->handle, WCD_BOLERO_EVT_RX_MUTE, WCD_BOLERO_EVT_RX_MUTE, (WCD_RX1 << 0x10 | 0x1)); (WCD_RX1 << 0x10 | 0x1)); } } break; break; case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD: if (!wcd937x->comp1_enable) if (!wcd937x->comp1_enable) Loading @@ -1040,10 +1057,12 @@ static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL2, WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x00); 0x05, 0x00); else else { snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_PDM_WD_CTL0, WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x00); 0x17, 0x00); clear_bit(WCD_EAR_EN, &wcd937x->status_mask); } usleep_range(10000, 10010); usleep_range(10000, 10010); /* disable EAR CnP FSM */ /* disable EAR CnP FSM */ snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, Loading Loading @@ -1109,6 +1128,8 @@ static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w, wcd937x_rx_connect_port(component, COMP_L, true); wcd937x_rx_connect_port(component, COMP_L, true); break; break; case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD: if (!test_bit(WCD_HPHL_EN, &wcd937x->status_mask) && !test_bit(WCD_EAR_EN, &wcd937x->status_mask)) { wcd937x_rx_connect_port(component, HPH_L, false); wcd937x_rx_connect_port(component, HPH_L, false); if (wcd937x->comp1_enable) if (wcd937x->comp1_enable) wcd937x_rx_connect_port(component, COMP_L, false); wcd937x_rx_connect_port(component, COMP_L, false); Loading @@ -1116,6 +1137,7 @@ static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, snd_soc_component_update_bits(component, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x01, 0x00); 0x01, 0x00); } break; break; }; }; return 0; return 0; Loading
asoc/msm-audio-effects-q6-v2.c +9 −0 Original line number Original line Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ */ #include <linux/slab.h> #include <linux/slab.h> Loading Loading @@ -1002,6 +1003,14 @@ int msm_audio_effects_pbe_handler(struct audio_client *ac, pbe->config.reserved = pbe->config.reserved = GET_NEXT(values, param_max_offset, rc); GET_NEXT(values, param_max_offset, rc); if ((pbe->config.bandpass_filter_order > 3) || (pbe->config.bandpass_filter_order < 1)) { pr_err("%s: Invalid BPF order\n", __func__); rc = -EINVAL; goto invalid_config; } p_coeffs = &pbe->config.p1LowPassCoeffs[0]; p_coeffs = &pbe->config.p1LowPassCoeffs[0]; lpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; lpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; hpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; hpf_len = (pbe->config.xover_filter_order == 3) ? 10 : 5; Loading
dsp/q6afe.c +14 −0 Original line number Original line Diff line number Diff line Loading @@ -9974,6 +9974,7 @@ static int afe_spv4_get_calib_data( struct param_hdr_v3 param_hdr; struct param_hdr_v3 param_hdr; int port = SLIMBUS_4_TX; int port = SLIMBUS_4_TX; int ret = -EINVAL; int ret = -EINVAL; uint32_t th_vi_ca_state; if (!calib_resp) { if (!calib_resp) { pr_err("%s: Invalid params\n", __func__); pr_err("%s: Invalid params\n", __func__); Loading @@ -9995,6 +9996,12 @@ static int afe_spv4_get_calib_data( __func__, port, param_hdr.param_id, ret); __func__, port, param_hdr.param_id, ret); goto get_params_fail; goto get_params_fail; } } th_vi_ca_state = this_afe.spv4_calib_data.res_cfg.th_vi_ca_state; if (th_vi_ca_state < FBSP_INCORRECT_OP_MODE || th_vi_ca_state > MAX_FBSP_STATE) { pr_err("%s: invalid fbsp state %d\n", __func__, th_vi_ca_state); goto get_params_fail; } memcpy(&calib_resp->res_cfg, &this_afe.spv4_calib_data.res_cfg, memcpy(&calib_resp->res_cfg, &this_afe.spv4_calib_data.res_cfg, sizeof(this_afe.calib_data.res_cfg)); sizeof(this_afe.calib_data.res_cfg)); pr_info("%s: state %s resistance %d %d\n", __func__, pr_info("%s: state %s resistance %d %d\n", __func__, Loading @@ -10013,6 +10020,7 @@ int afe_spk_prot_get_calib_data(struct afe_spkr_prot_get_vi_calib *calib_resp) struct param_hdr_v3 param_hdr; struct param_hdr_v3 param_hdr; int port = SLIMBUS_4_TX; int port = SLIMBUS_4_TX; int ret = -EINVAL; int ret = -EINVAL; uint32_t th_vi_ca_state; if (!calib_resp) { if (!calib_resp) { pr_err("%s: Invalid params\n", __func__); pr_err("%s: Invalid params\n", __func__); Loading @@ -10034,6 +10042,12 @@ int afe_spk_prot_get_calib_data(struct afe_spkr_prot_get_vi_calib *calib_resp) __func__, port, param_hdr.param_id, ret); __func__, port, param_hdr.param_id, ret); goto get_params_fail; goto get_params_fail; } } th_vi_ca_state = this_afe.calib_data.res_cfg.th_vi_ca_state; if (th_vi_ca_state < FBSP_INCORRECT_OP_MODE || th_vi_ca_state > MAX_FBSP_STATE) { pr_err("%s: invalid fbsp state %d\n", __func__, th_vi_ca_state); goto get_params_fail; } memcpy(&calib_resp->res_cfg, &this_afe.calib_data.res_cfg, memcpy(&calib_resp->res_cfg, &this_afe.calib_data.res_cfg, sizeof(this_afe.calib_data.res_cfg)); sizeof(this_afe.calib_data.res_cfg)); pr_info("%s: state %s resistance %d %d\n", __func__, pr_info("%s: state %s resistance %d %d\n", __func__, Loading