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Commit 8994181a authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Shawn Guo
Browse files

ARM: dts: imx27-phytec-phycore-rdk: Add display support 



This patch adds FB, Sharp-LQ035Q7 display (add-on module) and
corresponded pinctrl devicetree nodes to the Phytec PCM970 RDK.

Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent b04415cf

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts

+64 −0
Original line number Original line Diff line number Diff line
@@ -12,6 +12,27 @@ 
/ {

/ {

	model = "Phytec pcm970";

	model = "Phytec pcm970";

	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";

	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";



	display0: LQ035Q7 {

		model = "Sharp-LQ035Q7";

		native-mode = <&timing0>;

		bits-per-pixel = <16>;

		fsl,pcr = <0xf00080c0>;



		display-timings {

			timing0: 240x320 {

				clock-frequency = <5500000>;

				hactive = <240>;

				vactive = <320>;

				hback-porch = <5>;

				hsync-len = <7>;

				hfront-porch = <16>;

				vback-porch = <7>;

				vsync-len = <1>;

				vfront-porch = <9>;

			};

		};

	};

};

};





&cspi1 {

&cspi1 {
@@ -21,6 +42,17 @@ 
		   <&gpio4 27 GPIO_ACTIVE_LOW>;

		   <&gpio4 27 GPIO_ACTIVE_LOW>;

};

};





&fb {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_imxfb1>;

	display = <&display0>;

	lcd-supply = <&reg_5v0>;

	fsl,dmacr = <0x00020010>;

	fsl,lscr1 = <0x00120300>;

	fsl,lpccr = <0x00a903ff>;

	status = "okay";

};



&i2c1 {

&i2c1 {

	clock-frequency = <400000>;

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default";
@@ -43,6 +75,38 @@ 
			>;

			>;

		};

		};





		pinctrl_imxfb1: imxfbgrp {

			fsl,pins = <

				MX27_PAD_LD0__LD0 0x0

				MX27_PAD_LD1__LD1 0x0

				MX27_PAD_LD2__LD2 0x0

				MX27_PAD_LD3__LD3 0x0

				MX27_PAD_LD4__LD4 0x0

				MX27_PAD_LD5__LD5 0x0

				MX27_PAD_LD6__LD6 0x0

				MX27_PAD_LD7__LD7 0x0

				MX27_PAD_LD8__LD8 0x0

				MX27_PAD_LD9__LD9 0x0

				MX27_PAD_LD10__LD10 0x0

				MX27_PAD_LD11__LD11 0x0

				MX27_PAD_LD12__LD12 0x0

				MX27_PAD_LD13__LD13 0x0

				MX27_PAD_LD14__LD14 0x0

				MX27_PAD_LD15__LD15 0x0

				MX27_PAD_LD16__LD16 0x0

				MX27_PAD_LD17__LD17 0x0

				MX27_PAD_CLS__CLS 0x0

				MX27_PAD_CONTRAST__CONTRAST 0x0

				MX27_PAD_LSCLK__LSCLK 0x0

				MX27_PAD_OE_ACD__OE_ACD 0x0

				MX27_PAD_PS__PS 0x0

				MX27_PAD_REV__REV 0x0

				MX27_PAD_SPL_SPR__SPL_SPR 0x0

				MX27_PAD_HSYNC__HSYNC 0x0

				MX27_PAD_VSYNC__VSYNC 0x0

			>;

		};



		pinctrl_i2c1: i2c1grp {

		pinctrl_i2c1: i2c1grp {

			/* Add pullup to DATA line */

			/* Add pullup to DATA line */

			fsl,pins = <

			fsl,pins = <