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Commit 89823edc authored by Priit Laes's avatar Priit Laes Committed by Greg Kroah-Hartman
Browse files

staging: fbtft: Use standard MIPI DCS command defines for ili9481 



This patch makes use of the standard MIPI Display Command Set to remove
some of the magic constants found in source code.

Signed-off-by: default avatarPriit Laes <plaes@plaes.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 467786c1

drivers/staging/fbtft/fb_ili9481.c

+17 −13
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/delay.h>

#include <video/mipi_display.h>



#include "fbtft.h"
@@ -29,7 +30,7 @@ 
static int default_init_sequence[] = {



	/* SLP_OUT - Sleep out */

	-1, 0x11,

	-1, MIPI_DCS_EXIT_SLEEP_MODE,

	-2, 50,

	/* Power setting */

	-1, 0xD0, 0x07, 0x42, 0x18,
@@ -42,25 +43,24 @@ static int default_init_sequence[] = { 
	/* Frame rate & inv. */

	-1, 0xC5, 0x03,

	/* Pixel format */

	-1, 0x3A, 0x55,

	-1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55,

	/* Gamma */

	-1, 0xC8, 0x00, 0x32, 0x36, 0x45, 0x06, 0x16,

		  0x37, 0x75, 0x77, 0x54, 0x0C, 0x00,

	/* DISP_ON */

	-1, 0x29,

	-1, MIPI_DCS_SET_DISPLAY_ON,

	-3

};



static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)

{

	/* column address */

	write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);

	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,

		  xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);



	/* Row address */

	write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);

	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,

		  ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);



	/* memory write */

	write_reg(par, 0x2c);

	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);

}



#define HFLIP 0x01
@@ -70,16 +70,20 @@ static int set_var(struct fbtft_par *par) 
{

	switch (par->info->var.rotate) {

	case 270:

		write_reg(par, 0x36, ROWxCOL | HFLIP | VFLIP | (par->bgr << 3));

		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,

			  ROWxCOL | HFLIP | VFLIP | (par->bgr << 3));

		break;

	case 180:

		write_reg(par, 0x36, VFLIP | (par->bgr << 3));

		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,

			  VFLIP | (par->bgr << 3));

		break;

	case 90:

		write_reg(par, 0x36, ROWxCOL | (par->bgr << 3));

		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,

			  ROWxCOL | (par->bgr << 3));

		break;

	default:

		write_reg(par, 0x36, HFLIP | (par->bgr << 3));

		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,

			  HFLIP | (par->bgr << 3));

		break;

	}