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Commit 894edb9d authored by Chandana Kishori Chiluveru's avatar Chandana Kishori Chiluveru
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ARM: dts: msm: Add default pinctrl state for BENGAL HSUART

When device gets probed, kernel picks up default state and sets
pinctrl to that configuration. Since default state contains UART
functionality, GPIO pins remains high which consumes power.

To resolve power leakage issue, add additional active state to
configure UART functionality and keep default state for the GPIO
during probe.

Change-Id: Id7469d742ad6be404760212a52f6f8a618851daa
parent 39acd534
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+28 −0
Original line number Diff line number Diff line
@@ -330,6 +330,34 @@
		};

		qupv3_se3_4uart_pins: qupv3_se3_4uart_pins {
			qupv3_se3_default_ctsrtsrx:
				qupv3_se3_default_ctsrtsrx {
				mux {
					pins = "gpio8", "gpio9", "gpio11";
					function = "gpio";
				};

				config {
					pins = "gpio8", "gpio9", "gpio11";
					drive-strength = <2>;
					bias-pull-down;
				};
			};

			qupv3_se3_default_tx:
				qupv3_se3_default_tx {
				mux {
					pins = "gpio10";
					function = "gpio";
				};

				config {
					pins = "gpio10";
					drive-strength = <2>;
					bias-pull-up;
				};
			};

			qupv3_se3_ctsrx: qupv3_se3_ctsrx {
				mux {
					pins = "gpio8", "gpio11";
+5 −3
Original line number Diff line number Diff line
@@ -66,11 +66,13 @@
		clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>,
			<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
			<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&qupv3_se3_ctsrx>, <&qupv3_se3_rts>,
						<&qupv3_se3_tx>;
		pinctrl-names = "default", "active", "sleep";
		pinctrl-0 = <&qupv3_se3_default_ctsrtsrx>,
						<&qupv3_se3_default_tx>;
		pinctrl-1 = <&qupv3_se3_ctsrx>, <&qupv3_se3_rts>,
						<&qupv3_se3_tx>;
		pinctrl-2 = <&qupv3_se3_ctsrx>, <&qupv3_se3_rts>,
						<&qupv3_se3_tx>;
		interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
				<&tlmm 11 IRQ_TYPE_LEVEL_HIGH>;
		qcom,wrapper-core = <&qupv3_0>;