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Commit 8945e37e authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Ralf Baechle
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MIPS: BMIPS: Add DTS files for several platforms



Most of the supported chips use legacy (non-DT) bootloaders, so they will
need to select an appropriate builtin DTB at compile time until the
bootloader is updated.  Provide suitable DTS files, and a means to compile
one of them into the kernel image.

Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Signed-off-by: default avatarJaedon Shin <jaedon.shin@gmail.com>
Cc: f.fainelli@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8858/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 81a07b4a
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+1 −0
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@@ -926,6 +926,7 @@ source "arch/mips/ath25/Kconfig"
source "arch/mips/ath79/Kconfig"
source "arch/mips/bcm47xx/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/bmips/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/jz4740/Kconfig"
source "arch/mips/lantiq/Kconfig"
+58 −0
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choice
	prompt "Built-in device tree"
	help
	  Legacy bootloaders do not pass a DTB pointer to the kernel, so
	  if a "wrapper" is not being used, the kernel will need to include
	  a device tree that matches the target board.

	  The builtin DTB will only be used if the firmware does not supply
	  a valid DTB.

config DT_NONE
	bool "None"

config DT_BCM93384WVG
	bool "BCM93384WVG Zephyr CPU"
	select BUILTIN_DTB

config DT_BCM93384WVG_VIPER
	bool "BCM93384WVG Viper CPU (EXPERIMENTAL)"
	select BUILTIN_DTB

config DT_BCM96368MVWG
	bool "BCM96368MVWG"
	select BUILTIN_DTB

config DT_BCM9EJTAGPRB
	bool "BCM9EJTAGPRB"
	select BUILTIN_DTB

config DT_BCM97125CBMB
	bool "BCM97125CBMB"
	select BUILTIN_DTB

config DT_BCM97346DBSMB
	bool "BCM97346DBSMB"
	select BUILTIN_DTB

config DT_BCM97358SVMB
	bool "BCM97358SVMB"
	select BUILTIN_DTB

config DT_BCM97360SVMB
	bool "BCM97360SVMB"
	select BUILTIN_DTB

config DT_BCM97362SVMB
	bool "BCM97362SVMB"
	select BUILTIN_DTB

config DT_BCM97420C
	bool "BCM97420C"
	select BUILTIN_DTB

config DT_BCM97425SVMB
	bool "BCM97425SVMB"
	select BUILTIN_DTB

endchoice
+11 −1
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dtb-$(CONFIG_BMIPS_GENERIC)	+= bcm93384wvg.dtb
dtb-$(CONFIG_DT_BCM93384WVG)		+= bcm93384wvg.dtb
dtb-$(CONFIG_DT_BCM93384WVG_VIPER)	+= bcm93384wvg_viper.dtb
dtb-$(CONFIG_DT_BCM96368MVWG)		+= bcm96368mvwg.dtb
dtb-$(CONFIG_DT_BCM9EJTAGPRB)		+= bcm9ejtagprb.dtb
dtb-$(CONFIG_DT_BCM97125CBMB)		+= bcm97125cbmb.dtb
dtb-$(CONFIG_DT_BCM97346DBSMB)		+= bcm97346dbsmb.dtb
dtb-$(CONFIG_DT_BCM97358SVMB)		+= bcm97358svmb.dtb
dtb-$(CONFIG_DT_BCM97360SVMB)		+= bcm97360svmb.dtb
dtb-$(CONFIG_DT_BCM97362SVMB)		+= bcm97362svmb.dtb
dtb-$(CONFIG_DT_BCM97420C)		+= bcm97420c.dtb
dtb-$(CONFIG_DT_BCM97425SVMB)		+= bcm97425svmb.dtb

obj-y				+= $(patsubst %.dtb, %.dtb.o, $(dtb-y))

+108 −0
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/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";

	memory@0 {
		device_type = "memory";

		/* Typical ranges.  The bootloader should fill these in. */
		reg = <0x06000000 0x02000000>,
		      <0x0e000000 0x02000000>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		/* 1/2 of the CPU core clock (standard MIPS behavior) */
		mips-hpt-frequency = <300000000>;

		cpu@0 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <0>;
		};
	};

	cpu_intc: cpu_intc {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	clocks {
		periph_clk: periph_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <54000000>;
		};
	};

	aliases {
		uart0 = &uart0;
	};

	ubus {
		#address-cells = <1>;
		#size-cells = <1>;

		compatible = "brcm,ubus", "simple-bus";
		ranges;
		/* No dma-ranges on Viper. */

		periph_intc: periph_intc@14e00048 {
			compatible = "brcm,bcm3380-l2-intc";
			reg = <0x14e00048 0x4 0x14e0004c 0x4>,
			      <0x14e00350 0x4 0x14e00354 0x4>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <4>;
		};

		cmips_intc: cmips_intc@151f8048 {
			compatible = "brcm,bcm3380-l2-intc";
			reg = <0x151f8048 0x4 0x151f804c 0x4>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;
			interrupts = <30>;
			brcm,int-map-mask = <0xffffffff>;
		};

		uart0: serial@14e00520 {
			compatible = "brcm,bcm6345-uart";
			reg = <0x14e00520 0x18>;
			interrupt-parent = <&periph_intc>;
			interrupts = <2>;
			clocks = <&periph_clk>;
			status = "disabled";
		};

		ehci0: usb@15400300 {
			compatible = "brcm,bcm3384-ehci", "generic-ehci";
			reg = <0x15400300 0x100>;
			big-endian;
			interrupt-parent = <&periph_intc>;
			interrupts = <41>;
			status = "disabled";
		};

		ohci0: usb@15400400 {
			compatible = "brcm,bcm3384-ohci", "generic-ohci";
			reg = <0x15400400 0x100>;
			big-endian;
			no-big-frame-no;
			interrupt-parent = <&periph_intc>;
			interrupts = <40>;
			status = "disabled";
		};
	};
};
+86 −0
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/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm6328";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		mips-hpt-frequency = <160000000>;

		cpu@0 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <1>;
		};
	};

	clocks {
		periph_clk: periph_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <50000000>;
		};
	};

	aliases {
		uart0 = &uart0;
	};

	cpu_intc: cpu_intc {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	ubus {
		#address-cells = <1>;
		#size-cells = <1>;

		compatible = "simple-bus";
		ranges;

		periph_intc: periph_intc@10000020 {
			compatible = "brcm,bcm3380-l2-intc";
			reg = <0x10000024 0x4 0x1000002c 0x4>,
			      <0x10000020 0x4 0x10000028 0x4>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <2>;
		};

		uart0: serial@10000100 {
			compatible = "brcm,bcm6345-uart";
			reg = <0x10000100 0x18>;
			interrupt-parent = <&periph_intc>;
			interrupts = <28>;
			clocks = <&periph_clk>;
			status = "disabled";
		};

		timer: timer@10000040 {
			compatible = "syscon";
			reg = <0x10000040 0x2c>;
			little-endian;
		};

		reboot {
			compatible = "syscon-reboot";
			regmap = <&timer>;
			offset = <0x28>;
			mask = <0x1>;
		};
	};
};
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