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Commit 88fe3529 authored by David S. Miller's avatar David S. Miller
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Merge branch 'sparc64-ADI'



Khalid Aziz says:

====================
Application Data Integrity feature introduced by SPARC M7

V12 changes:
This series is same as v10 and v11 and was simply rebased on 4.16-rc2
kernel and patch 11 was added to update signal delivery code to use the
new helper functions added by Eric Biederman. Can mm maintainers please
review patches 2, 7, 8 and 9 which are arch independent, and
include/linux/mm.h and mm/ksm.c changes in patch 10 and ack these if
everything looks good?

SPARC M7 processor adds additional metadata for memory address space
that can be used to secure access to regions of memory. This additional
metadata is implemented as a 4-bit tag attached to each cacheline size
block of memory. A task can set a tag on any number of such blocks.
Access to such block is granted only if the virtual address used to
access that block of memory has the tag encoded in the uppermost 4 bits
of VA. Since sparc processor does not implement all 64 bits of VA, top 4
bits are available for ADI tags. Any mismatch between tag encoded in VA
and tag set on the memory block results in a trap. Tags are verified in
the VA presented to the MMU and tags are associated with the physical
page VA maps on to. If a memory page is swapped out and page frame gets
reused for another task, the tags are lost and hence must be saved when
swapping or migrating the page.

A userspace task enables ADI through mprotect(). This patch series adds
a page protection bit PROT_ADI and a corresponding VMA flag
VM_SPARC_ADI. VM_SPARC_ADI is used to trigger setting TTE.mcd bit in the
sparc pte that enables ADI checking on the corresponding page. MMU
validates the tag embedded in VA for every page that has TTE.mcd bit set
in its pte. After enabling ADI on a memory range, the userspace task can
set ADI version tags using stxa instruction with ASI_MCD_PRIMARY or
ASI_MCD_ST_BLKINIT_PRIMARY ASI.

Once userspace task calls mprotect() with PROT_ADI, kernel takes
following overall steps:

1. Find the VMAs covering the address range passed in to mprotect and
set VM_SPARC_ADI flag. If address range covers a subset of a VMA, the
VMA will be split.

2. When a page is allocated for a VA and the VMA covering this VA has
VM_SPARC_ADI flag set, set the TTE.mcd bit so MMU will check the
vwersion tag.

3. Userspace can now set version tags on the memory it has enabled ADI
on. Userspace accesses ADI enabled memory using a virtual address that
has the version tag embedded in the high bits. MMU validates this
version tag against the actual tag set on the memory. If tag matches,
MMU performs the VA->PA translation and access is granted. If there is a
mismatch, hypervisor sends a data access exception or precise memory
corruption detected exception depending upon whether precise exceptions
are enabled or not (controlled by MCDPERR register). Kernel sends
SIGSEGV to the task with appropriate si_code.

4. If a page is being swapped out or migrated, kernel must save any ADI
tags set on the page. Kernel maintains a page worth of tag storage
descriptors. Each descriptors pointsto a tag storage space and the
address range it covers. If the page being swapped out or migrated has
ADI enabled on it, kernel finds a tag storage descriptor that covers the
address range for the page or allocates a new descriptor if none of the
existing descriptors cover the address range. Kernel saves tags from the
page into the tag storage space descriptor points to.

5. When the page is swapped back in or reinstantiated after migration,
kernel restores the version tags on the new physical page by retrieving
the original tag from tag storage pointed to by a tag storage descriptor
for the virtual address range for new page.

User task can disable ADI by calling mprotect() again on the memory
range with PROT_ADI bit unset. Kernel clears the VM_SPARC_ADI flag in
VMAs, merges adjacent VMAs if necessary, and clears TTE.mcd bit in the
corresponding ptes.

IOMMU does not support ADI checking. Any version tags embedded in the
top bits of VA meant for IOMMU, are cleared and replaced with sign
extension of the first non-version tag bit (bit 59 for SPARC M7) for
IOMMU addresses.

This patch series adds support for this feature in 11 patches:

Patch 1/11
  Tag mismatch on access by a task results in a trap from hypervisor as
  data access exception or a precide memory corruption detected
  exception. As part of handling these exceptions, kernel sends a
  SIGSEGV to user process with special si_code to indicate which fault
  occurred. This patch adds three new si_codes to differentiate between
  various mismatch errors.

Patch 2/11
  When a page is swapped or migrated, metadata associated with the page
  must be saved so it can be restored later. This patch adds a new
  function that saves/restores this metadata when updating pte upon a
  swap/migration.

Patch 3/11
  SPARC M7 processor adds new fields to control registers to support ADI
  feature. It also adds a new exception for precise traps on tag
  mismatch. This patch adds definitions for the new control register
  fields, new ASIs for ADI and an exception handler for the precise trap
  on tag mismatch.

Patch 4/11
  New hypervisor fault types were added by sparc M7 processor to support
  ADI feature. This patch adds code to handle these fault types for data
  access exception handler.

Patch 5/11
  When ADI is in use for a page and a tag mismatch occurs, processor
  raises "Memory corruption Detected" trap. This patch adds a handler
  for this trap.

Patch 6/11
  ADI usage is governed by ADI properties on a platform. These
  properties are provided to kernel by firmware. Thsi patch adds new
  auxiliary vectors that provide these values to userpsace.

Patch 7/11
  arch_validate_prot() is used to validate the new protection bits asked
  for by the userspace app. Validating protection bits may need the
  context of address space the bits are being applied to. One such
  example is PROT_ADI bit on sparc processor that enables ADI protection
  on an address range. ADI protection applies only to addresses covered
  by physical RAM and not other PFN mapped addresses or device
  addresses. This patch adds "address" to the parameters being passed to
  arch_validate_prot() to provide that context.

Patch 8/11
  When protection bits are changed on a page, kernel carries forward all
  protection bits except for read/write/exec. Additional code was added
  to allow kernel to clear PKEY bits on x86 but this requirement to
  clear other bits is not unique to x86. This patch extends the existing
  code to allow other architectures to clear any other protection bits
  as well on protection bit change.

Patch 9/11
  When a processor supports additional metadata on memory pages, that
  additional metadata needs to be copied to new memory pages when those
  pages are moved. This patch allows architecture specific code to
  replace the default copy_highpage() routine with arch specific
  version that copies the metadata as well besides the data on the page.

Patch 10/11
  This patch adds support for a user space task to enable ADI and enable
  tag checking for subsets of its address space. As part of enabling
  this feature, this patch adds to support manipulation of precise
  exception for memory corruption detection, adds code to save and
  restore tags on page swap and migration, and adds code to handle ADI
  tagged addresses for DMA.

Patch 11/11
  Update signal delivery code in arch/sparc/kernel/traps_64.c to use
  the new helper function force_sig_fault() added by commit
  f8ec6601 ("signal: Add send_sig_fault and force_sig_fault").

Changelog v12:

	  - Rebased to 4.16-rc2
	  - Added patch 11 to update signal delivery functions

Changelog v11:

	  - Rebased to 4.15

Changelog v10:

	  - Patch 1/10: Updated si_codes definitions for SEGV to match 4.14
	  - Patch 2/10: No changes
	  - Patch 3/10: Updated copyright
	  - Patch 4/10: No changes
	  - Patch 5/10: No changes
	  - Patch 6/10: Updated copyright
	  - Patch 7/10: No changes
	  - Patch 8/10: No changes
	  - Patch 9/10: No changes
	  - Patch 10/10: Added code to return from kernel path to set
	    PSTATE.mcde if kernel continues execution in another thread
	      (Suggested by Anthony)

Changelog v9:

	  - Patch 1/10: No changes
	  - Patch 2/10: No changes
	  - Patch 3/10: No changes
	  - Patch 4/10: No changes
	  - Patch 5/10: No changes
	  - Patch 6/10: No changes
	  - Patch 7/10: No changes
	  - Patch 8/10: No changes
	  - Patch 9/10: New patch
	  - Patch 10/10: Patch 9 from v8. Added code to copy ADI tags when
	    pages are migrated. Updated code to detect overflow and underflow
	      of addresses when allocating tag storage.

Changelog v8:

	  - Patch 1/9: No changes
	  - Patch 2/9: Fixed and erroneous "}"
	  - Patch 3/9: Minor print formatting change
	  - Patch 4/9: No changes
	  - Patch 5/9: No changes
	  - Patch 6/9: Added AT_ADI_UEONADI back
	  - Patch 7/9: Added addr parameter to powerpc arch_validate_prot()
	  - Patch 8/9: No changes
	  - Patch 9/9:
	    - Documentation updates
	      - Added an IPI on mprotect(...PROT_ADI...) call and
	      	  restore of TSTATE.MCDE on context switch
		  	  - Removed restriction on enabling ADI on read-only
			      memory
				- Changed kzalloc() for tag storage to use GFP_NOWAIT
				  - Added code to handle overflow and underflow when
				      allocating tag storage
				      		 - Replaced sun_m7_patch_1insn_range() with
						     sun4v_patch_1insn_range()
							- Added membar after restoring ADI tags in
							    copy_user_highpage()

Changelog v7:

	  - Patch 1/9: No changes
	  - Patch 2/9: Updated parameters to arch specific swap in/out
	    handlers
	    - Patch 3/9: No changes
	    - Patch 4/9: new patch split off from patch 4/4 in v6
	    - Patch 5/9: new patch split off from patch 4/4 in v6
	    - Patch 6/9: new patch split off from patch 4/4 in v6
	    - Patch 7/9: new patch
	    - Patch 8/9: new patch
	    - Patch 9/9:
	      - Enhanced arch_validate_prot() to enable ADI only on
	      	  writable addresses backed by physical RAM
		  	   - Added support for saving/restoring ADI tags for each
			       ADI block size address range on a page on swap in/out
			       	   - copy ADI tags on COW
				     - Updated values for auxiliary vectors to not conflict
				         with values on other architectures to avoid conflict
					        in glibc
						   - Disable same page merging on ADI enabled pages
						     - Enable ADI only on writable addresses backed by
						         physical RAM
							 	  - Split parts of patch off into separate patches

Changelog v6:
	  - Patch 1/4: No changes
	  - Patch 2/4: No changes
	  - Patch 3/4: Added missing nop in the delay slot in
	    sun4v_mcd_detect_precise
	    - Patch 4/4: Eliminated instructions to read and write PSTATE
	      as well as MCDPER and PMCDPER on every access to userspace
	        addresses by setting PSTATE and PMCDPER correctly upon entry
		  into kernel

Changelog v5:
	  - Patch 1/4: No changes
	  - Patch 2/4: Replaced set_swp_pte_at() with new architecture
	    functions arch_do_swap_page() and arch_unmap_one() that
	      suppoprt architecture specific actions to be taken on page
	        swap and migration
		- Patch 3/4: Fixed indentation issues in assembly code
		- Patch 4/4:
		  - Fixed indentation issues and instrcuctions in assembly
		      code
			- Removed CONFIG_SPARC64 from mdesc.c
			  - Changed to maintain state of MCDPER register in thread
			      info flags as opposed to in mm context. MCDPER is a
			      	     per-thread state and belongs in thread info flag as
				     		  opposed to mm context which is shared across threads.
						  	    Added comments to clarify this is a lazily maintained
							    	    state and must be updated on context switch and
								    	    copy_process()
									    		   - Updated code to use the new arch_do_swap_page() and
											       arch_unmap_one() functions

Testing:

- All functionality was tested with 8K normal pages as well as hugepages
  using malloc, mmap and shm.
- Multiple long duration stress tests were run using hugepages over 2+
  months. Normal pages were tested with shorter duration stress tests.
- Tested swapping with malloc and shm by reducing max memory and
  allocating three times the available system memory by active processes
  using ADI on allocated memory. Ran through multiple hours long runs of
  this test.
- Tested page migration with malloc and shm by migrating data pages of
  active ADI test process using migratepages, back and forth between two
  nodes every few seconds over an hour long run. Verified page migration
  through /proc/<pid>/numa_maps.
- Tested COW support using test that forks children that read from
  ADI enabled pages shared with parent and other children and write to
  them as well forcing COW.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 8f5fd927 b9fa0365
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Application Data Integrity (ADI)
================================

SPARC M7 processor adds the Application Data Integrity (ADI) feature.
ADI allows a task to set version tags on any subset of its address
space. Once ADI is enabled and version tags are set for ranges of
address space of a task, the processor will compare the tag in pointers
to memory in these ranges to the version set by the application
previously. Access to memory is granted only if the tag in given pointer
matches the tag set by the application. In case of mismatch, processor
raises an exception.

Following steps must be taken by a task to enable ADI fully:

1. Set the user mode PSTATE.mcde bit. This acts as master switch for
   the task's entire address space to enable/disable ADI for the task.

2. Set TTE.mcd bit on any TLB entries that correspond to the range of
   addresses ADI is being enabled on. MMU checks the version tag only
   on the pages that have TTE.mcd bit set.

3. Set the version tag for virtual addresses using stxa instruction
   and one of the MCD specific ASIs. Each stxa instruction sets the
   given tag for one ADI block size number of bytes. This step must
   be repeated for entire page to set tags for entire page.

ADI block size for the platform is provided by the hypervisor to kernel
in machine description tables. Hypervisor also provides the number of
top bits in the virtual address that specify the version tag.  Once
version tag has been set for a memory location, the tag is stored in the
physical memory and the same tag must be present in the ADI version tag
bits of the virtual address being presented to the MMU. For example on
SPARC M7 processor, MMU uses bits 63-60 for version tags and ADI block
size is same as cacheline size which is 64 bytes. A task that sets ADI
version to, say 10, on a range of memory, must access that memory using
virtual addresses that contain 0xa in bits 63-60.

ADI is enabled on a set of pages using mprotect() with PROT_ADI flag.
When ADI is enabled on a set of pages by a task for the first time,
kernel sets the PSTATE.mcde bit fot the task. Version tags for memory
addresses are set with an stxa instruction on the addresses using
ASI_MCD_PRIMARY or ASI_MCD_ST_BLKINIT_PRIMARY. ADI block size is
provided by the hypervisor to the kernel.  Kernel returns the value of
ADI block size to userspace using auxiliary vector along with other ADI
info. Following auxiliary vectors are provided by the kernel:

	AT_ADI_BLKSZ	ADI block size. This is the granularity and
			alignment, in bytes, of ADI versioning.
	AT_ADI_NBITS	Number of ADI version bits in the VA


IMPORTANT NOTES:

- Version tag values of 0x0 and 0xf are reserved. These values match any
  tag in virtual address and never generate a mismatch exception.

- Version tags are set on virtual addresses from userspace even though
  tags are stored in physical memory. Tags are set on a physical page
  after it has been allocated to a task and a pte has been created for
  it.

- When a task frees a memory page it had set version tags on, the page
  goes back to free page pool. When this page is re-allocated to a task,
  kernel clears the page using block initialization ASI which clears the
  version tags as well for the page. If a page allocated to a task is
  freed and allocated back to the same task, old version tags set by the
  task on that page will no longer be present.

- ADI tag mismatches are not detected for non-faulting loads.

- Kernel does not set any tags for user pages and it is entirely a
  task's responsibility to set any version tags. Kernel does ensure the
  version tags are preserved if a page is swapped out to the disk and
  swapped back in. It also preserves that version tags if a page is
  migrated.

- ADI works for any size pages. A userspace task need not be aware of
  page size when using ADI. It can simply select a virtual address
  range, enable ADI on the range using mprotect() and set version tags
  for the entire range. mprotect() ensures range is aligned to page size
  and is a multiple of page size.

- ADI tags can only be set on writable memory. For example, ADI tags can
  not be set on read-only mappings.



ADI related traps
-----------------

With ADI enabled, following new traps may occur:

Disrupting memory corruption

	When a store accesses a memory localtion that has TTE.mcd=1,
	the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
	tag in the address used (bits 63:60) does not match the tag set on
	the corresponding cacheline, a memory corruption trap occurs. By
	default, it is a disrupting trap and is sent to the hypervisor
	first. Hypervisor creates a sun4v error report and sends a
	resumable error (TT=0x7e) trap to the kernel. The kernel sends
	a SIGSEGV to the task that resulted in this trap with the following
	info:

		siginfo.si_signo = SIGSEGV;
		siginfo.errno = 0;
		siginfo.si_code = SEGV_ADIDERR;
		siginfo.si_addr = addr; /* PC where first mismatch occurred */
		siginfo.si_trapno = 0;


Precise memory corruption

	When a store accesses a memory location that has TTE.mcd=1,
	the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
	tag in the address used (bits 63:60) does not match the tag set on
	the corresponding cacheline, a memory corruption trap occurs. If
	MCD precise exception is enabled (MCDPERR=1), a precise
	exception is sent to the kernel with TT=0x1a. The kernel sends
	a SIGSEGV to the task that resulted in this trap with the following
	info:

		siginfo.si_signo = SIGSEGV;
		siginfo.errno = 0;
		siginfo.si_code = SEGV_ADIPERR;
		siginfo.si_addr = addr;	/* address that caused trap */
		siginfo.si_trapno = 0;

	NOTE: ADI tag mismatch on a load always results in precise trap.


MCD disabled

	When a task has not enabled ADI and attempts to set ADI version
	on a memory address, processor sends an MCD disabled trap. This
	trap is handled by hypervisor first and the hypervisor vectors this
	trap through to the kernel as Data Access Exception trap with
	fault type set to 0xa (invalid ASI). When this occurs, the kernel
	sends the task SIGSEGV signal with following info:

		siginfo.si_signo = SIGSEGV;
		siginfo.errno = 0;
		siginfo.si_code = SEGV_ACCADI;
		siginfo.si_addr = addr;	/* address that caused trap */
		siginfo.si_trapno = 0;


Sample program to use ADI
-------------------------

Following sample program is meant to illustrate how to use the ADI
functionality.

#include <unistd.h>
#include <stdio.h>
#include <stdlib.h>
#include <elf.h>
#include <sys/ipc.h>
#include <sys/shm.h>
#include <sys/mman.h>
#include <asm/asi.h>

#ifndef AT_ADI_BLKSZ
#define AT_ADI_BLKSZ	48
#endif
#ifndef AT_ADI_NBITS
#define AT_ADI_NBITS	49
#endif

#ifndef PROT_ADI
#define PROT_ADI	0x10
#endif

#define BUFFER_SIZE     32*1024*1024UL

main(int argc, char* argv[], char* envp[])
{
        unsigned long i, mcde, adi_blksz, adi_nbits;
        char *shmaddr, *tmp_addr, *end, *veraddr, *clraddr;
        int shmid, version;
	Elf64_auxv_t *auxv;

	adi_blksz = 0;

	while(*envp++ != NULL);
	for (auxv = (Elf64_auxv_t *)envp; auxv->a_type != AT_NULL; auxv++) {
		switch (auxv->a_type) {
		case AT_ADI_BLKSZ:
			adi_blksz = auxv->a_un.a_val;
			break;
		case AT_ADI_NBITS:
			adi_nbits = auxv->a_un.a_val;
			break;
		}
	}
	if (adi_blksz == 0) {
		fprintf(stderr, "Oops! ADI is not supported\n");
		exit(1);
	}

	printf("ADI capabilities:\n");
	printf("\tBlock size = %ld\n", adi_blksz);
	printf("\tNumber of bits = %ld\n", adi_nbits);

        if ((shmid = shmget(2, BUFFER_SIZE,
                                IPC_CREAT | SHM_R | SHM_W)) < 0) {
                perror("shmget failed");
                exit(1);
        }

        shmaddr = shmat(shmid, NULL, 0);
        if (shmaddr == (char *)-1) {
                perror("shm attach failed");
                shmctl(shmid, IPC_RMID, NULL);
                exit(1);
        }

	if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE|PROT_ADI)) {
		perror("mprotect failed");
		goto err_out;
	}

        /* Set the ADI version tag on the shm segment
         */
        version = 10;
        tmp_addr = shmaddr;
        end = shmaddr + BUFFER_SIZE;
        while (tmp_addr < end) {
                asm volatile(
                        "stxa %1, [%0]0x90\n\t"
                        :
                        : "r" (tmp_addr), "r" (version));
                tmp_addr += adi_blksz;
        }
	asm volatile("membar #Sync\n\t");

        /* Create a versioned address from the normal address by placing
	 * version tag in the upper adi_nbits bits
         */
        tmp_addr = (void *) ((unsigned long)shmaddr << adi_nbits);
        tmp_addr = (void *) ((unsigned long)tmp_addr >> adi_nbits);
        veraddr = (void *) (((unsigned long)version << (64-adi_nbits))
                        | (unsigned long)tmp_addr);

        printf("Starting the writes:\n");
        for (i = 0; i < BUFFER_SIZE; i++) {
                veraddr[i] = (char)(i);
                if (!(i % (1024 * 1024)))
                        printf(".");
        }
        printf("\n");

        printf("Verifying data...");
	fflush(stdout);
        for (i = 0; i < BUFFER_SIZE; i++)
                if (veraddr[i] != (char)i)
                        printf("\nIndex %lu mismatched\n", i);
        printf("Done.\n");

        /* Disable ADI and clean up
         */
	if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE)) {
		perror("mprotect failed");
		goto err_out;
	}

        if (shmdt((const void *)shmaddr) != 0)
                perror("Detach failure");
        shmctl(shmid, IPC_RMID, NULL);

        exit(0);

err_out:
        if (shmdt((const void *)shmaddr) != 0)
                perror("Detach failure");
        shmctl(shmid, IPC_RMID, NULL);
        exit(1);
}
+2 −2
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
}
#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)

static inline bool arch_validate_prot(unsigned long prot)
static inline bool arch_validate_prot(unsigned long prot, unsigned long addr)
{
	if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM | PROT_SAO))
		return false;
@@ -51,7 +51,7 @@ static inline bool arch_validate_prot(unsigned long prot)
		return false;
	return true;
}
#define arch_validate_prot(prot) arch_validate_prot(prot)
#define arch_validate_prot arch_validate_prot

#endif /* CONFIG_PPC64 */
#endif	/* _ASM_POWERPC_MMAN_H */
+1 −1
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@ static inline long do_mmap2(unsigned long addr, size_t len,
{
	long ret = -EINVAL;

	if (!arch_validate_prot(prot))
	if (!arch_validate_prot(prot, addr))
		goto out;

	if (shift) {
+6 −0
Original line number Diff line number Diff line
#ifndef ___ASM_SPARC_ADI_H
#define ___ASM_SPARC_ADI_H
#if defined(__sparc__) && defined(__arch64__)
#include <asm/adi_64.h>
#endif
#endif
+47 −0
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/* adi_64.h: ADI related data structures
 *
 * Copyright (c) 2016 Oracle and/or its affiliates. All rights reserved.
 * Author: Khalid Aziz (khalid.aziz@oracle.com)
 *
 * This work is licensed under the terms of the GNU GPL, version 2.
 */
#ifndef __ASM_SPARC64_ADI_H
#define __ASM_SPARC64_ADI_H

#include <linux/types.h>

#ifndef __ASSEMBLY__

struct adi_caps {
	__u64 blksz;
	__u64 nbits;
	__u64 ue_on_adi;
};

struct adi_config {
	bool enabled;
	struct adi_caps caps;
};

extern struct adi_config adi_state;

extern void mdesc_adi_init(void);

static inline bool adi_capable(void)
{
	return adi_state.enabled;
}

static inline unsigned long adi_blksize(void)
{
	return adi_state.caps.blksz;
}

static inline unsigned long adi_nbits(void)
{
	return adi_state.caps.nbits;
}

#endif	/* __ASSEMBLY__ */

#endif	/* !(__ASM_SPARC64_ADI_H) */
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