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Commit 88f3a358 authored by Olivier Grenie's avatar Olivier Grenie Committed by Mauro Carvalho Chehab
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[media] dib8096P: add the reference board TFE8096P



The intend of this patch is to add the support for the DiBcom reference
board TFE8096P.

Signed-off-by: default avatarOlivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: default avatarPatrick Boettcher <patrick.boettcher@dibcom.fr>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 0c32dbd7
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+297 −0
Original line number Diff line number Diff line
@@ -1641,6 +1641,261 @@ static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
	return fe_slave == NULL ?  -ENODEV : 0;
}

/* TFE8096P */
static struct dibx000_agc_config dib8096p_agc_config[2] = {
	{
		.band_caps		= BAND_UHF,
		/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
		   P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
		   P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
		   P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
		   P_agc_write=0 */
		.setup			= (0 << 15) | (0 << 14) | (5 << 11)
			| (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
			| (0 << 4) | (5 << 1) | (0 << 0),

		.inv_gain		= 684,
		.time_stabiliz	= 10,

		.alpha_level	= 0,
		.thlock			= 118,

		.wbd_inv		= 0,
		.wbd_ref		= 1200,
		.wbd_sel		= 3,
		.wbd_alpha		= 5,

		.agc1_max		= 65535,
		.agc1_min		= 0,

		.agc2_max		= 32767,
		.agc2_min		= 0,

		.agc1_pt1		= 0,
		.agc1_pt2		= 0,
		.agc1_pt3		= 105,
		.agc1_slope1	= 0,
		.agc1_slope2	= 156,
		.agc2_pt1		= 105,
		.agc2_pt2		= 255,
		.agc2_slope1	= 54,
		.agc2_slope2	= 0,

		.alpha_mant		= 28,
		.alpha_exp		= 26,
		.beta_mant		= 31,
		.beta_exp		= 51,

		.perform_agc_softsplit = 0,
	} , {
		.band_caps		= BAND_FM | BAND_VHF | BAND_CBAND,
		/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
		   P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
		   P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
		   P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
		   P_agc_write=0 */
		.setup			= (0 << 15) | (0 << 14) | (5 << 11)
			| (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
			| (0 << 4) | (5 << 1) | (0 << 0),

		.inv_gain		= 732,
		.time_stabiliz  = 10,

		.alpha_level	= 0,
		.thlock			= 118,

		.wbd_inv		= 0,
		.wbd_ref		= 1200,
		.wbd_sel		= 3,
		.wbd_alpha		= 5,

		.agc1_max		= 65535,
		.agc1_min		= 0,

		.agc2_max		= 32767,
		.agc2_min		= 0,

		.agc1_pt1		= 0,
		.agc1_pt2		= 0,
		.agc1_pt3		= 98,
		.agc1_slope1	= 0,
		.agc1_slope2	= 167,
		.agc2_pt1		= 98,
		.agc2_pt2		= 255,
		.agc2_slope1	= 52,
		.agc2_slope2	= 0,

		.alpha_mant		= 28,
		.alpha_exp		= 26,
		.beta_mant		= 31,
		.beta_exp		= 51,

		.perform_agc_softsplit = 0,
	}
};

static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
	108000, 13500,
	1, 9, 1, 0, 0,
	0, 0, 0, 0, 2,
	(3 << 14) | (1 << 12) | (524 << 0),
	(0 << 25) | 0,
	20199729,
	12000000,
};

static struct dib8000_config tfe8096p_dib8000_config = {
	.output_mpeg2_in_188_bytes	= 1,
	.hostbus_diversity			= 1,
	.update_lna					= NULL,

	.agc_config_count			= 2,
	.agc						= dib8096p_agc_config,
	.pll						= &dib8096p_clock_config_12_mhz,

	.gpio_dir					= DIB8000_GPIO_DEFAULT_DIRECTIONS,
	.gpio_val					= DIB8000_GPIO_DEFAULT_VALUES,
	.gpio_pwm_pos				= DIB8000_GPIO_DEFAULT_PWM_POS,

	.agc_control				= NULL,
	.diversity_delay			= 48,
	.output_mode				= OUTMODE_MPEG2_FIFO,
	.enMpegOutput				= 1,
};

static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
	{ 380, 81, 850, 64, 540, 4},
	{ 860, 51, 866, 21, 375, 4},
	{1700, 0, 250, 0, 100, 6},
	{2600, 0, 250, 0, 100, 6},
	{ 0xFFFF, 0, 0, 0, 0, 0},
};

static const struct dib0090_config tfe8096p_dib0090_config = {
	.io.clock_khz			= 12000,
	.io.pll_bypass			= 0,
	.io.pll_range			= 0,
	.io.pll_prediv			= 3,
	.io.pll_loopdiv			= 6,
	.io.adc_clock_ratio		= 0,
	.io.pll_int_loop_filt	= 0,
	.reset					= dib8096p_tuner_sleep,
	.sleep					= dib8096p_tuner_sleep,

	.freq_offset_khz_uhf	= -143,
	.freq_offset_khz_vhf	= -143,

	.get_adc_power			= dib8090_get_adc_power,

	.clkouttobamse			= 1,
	.analog_output			= 0,

	.wbd_vhf_offset			= 0,
	.wbd_cband_offset		= 0,
	.use_pwm_agc			= 1,
	.clkoutdrive			= 0,

	.fref_clock_ratio		= 1,

	.wbd					= dib8096p_wbd_table,

	.ls_cfg_pad_drv			= 0,
	.data_tx_drv			= 0,
	.low_if					= NULL,
	.in_soc					= 1,
	.force_cband_input		= 0,
};

struct dibx090p_adc {
	u32 freq;			/* RF freq MHz */
	u32 timf;			/* New Timf */
	u32 pll_loopdiv;	/* New prediv */
	u32 pll_prediv;		/* New loopdiv */
};

struct dibx090p_adc dib8090p_adc_tab[] = {
	{ 50000, 17043521, 16, 3}, /* 64 MHz */
	{878000, 20199729, 9, 1}, /* 60 MHz */
	{0xffffffff, 0, 0, 0}, /* 60 MHz */
};

static int dib8096p_agc_startup(struct dvb_frontend *fe,
		struct dvb_frontend_parameters *fep)
{
	struct dvb_usb_adapter *adap = fe->dvb->priv;
	struct dib0700_adapter_state *state = adap->priv;
	struct dibx000_bandwidth_config pll;
	u16 target;
	int better_sampling_freq = 0, ret;
	struct dibx090p_adc *adc_table = &dib8090p_adc_tab[0];

	ret = state->set_param_save(fe, fep);
	if (ret < 0)
		return ret;
	memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));

	dib0090_pwm_gain_reset(fe);
	/* dib0090_get_wbd_target is returning any possible
	   temperature compensated wbd-target */
	target = (dib0090_get_wbd_target(fe) * 8  + 1) / 2;
	dib8000_set_wbd_ref(fe, target);


	while (fep->frequency / 1000 > adc_table->freq) {
		better_sampling_freq = 1;
		adc_table++;
	}

	if ((adc_table->freq != 0xffffffff) && better_sampling_freq) {
		pll.pll_ratio  = adc_table->pll_loopdiv;
		pll.pll_prediv = adc_table->pll_prediv;
		dib8000_update_pll(fe, &pll);
		dib8000_ctrl_timf(fe, DEMOD_TIMF_SET, adc_table->timf);
	}
	return 0;
}

static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
{
	dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
	msleep(20);
	dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
	dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
	dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);

	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);

	dib0700_ctrl_clock(adap->dev, 72, 1);

	msleep(20);
	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
	msleep(20);
	dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);

	dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);

	adap->fe_adap[0].fe = dvb_attach(dib8000_attach,
			&adap->dev->i2c_adap, 0x80, &tfe8096p_dib8000_config);

	return adap->fe_adap[0].fe == NULL ?  -ENODEV : 0;
}

static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
{
	struct dib0700_adapter_state *st = adap->priv;
	struct i2c_adapter *tun_i2c = dib8096p_get_i2c_tuner(adap->fe_adap[0].fe);

	if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
				&tfe8096p_dib0090_config) == NULL)
		return -ENODEV;

	dib8000_set_gpio(adap->fe_adap[0].fe, 8, 0, 1);

	st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
	adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
	return 0;
}

/* STK9090M */
static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
{
@@ -3234,6 +3489,7 @@ struct usb_device_id dib0700_usb_id_table[] = {
	{ USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV340E_SE) },
	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE7090E) },
	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE7790E) },
/* 80 */{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE8096P) },
	{ 0 }		/* Terminating entry */
};
MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -4369,6 +4625,47 @@ struct dvb_usb_device_properties dib0700_devices[] = {
			},
		},

		.rc.core = {
			.rc_interval      = DEFAULT_RC_INTERVAL,
			.rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
			.module_name	  = "dib0700",
			.rc_query         = dib0700_rc_query_old_firmware,
			.allowed_protos   = RC_TYPE_RC5 |
					    RC_TYPE_RC6 |
					    RC_TYPE_NEC,
			.change_protocol  = dib0700_change_protocol,
		},
	}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
		.num_adapters = 1,
		.adapter = {
			{
				.num_frontends = 1,
				.fe = {{
					.caps  = DVB_USB_ADAP_HAS_PID_FILTER |
						DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
					.pid_filter_count = 32,
					.pid_filter = stk80xx_pid_filter,
					.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
					.frontend_attach  = tfe8096p_frontend_attach,
					.tuner_attach     = tfe8096p_tuner_attach,

					DIB0700_DEFAULT_STREAMING_CONFIG(0x02),

				} },

				.size_of_priv =
					sizeof(struct dib0700_adapter_state),
			},
		},

		.num_device_descs = 1,
		.devices = {
			{   "DiBcom TFE8096P reference design",
				{ &dib0700_usb_id_table[80], NULL },
				{ NULL },
			},
		},

		.rc.core = {
			.rc_interval      = DEFAULT_RC_INTERVAL,
			.rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
+1 −0
Original line number Diff line number Diff line
@@ -109,6 +109,7 @@
#define USB_PID_DIBCOM_STK807XPVR			0x1f98
#define USB_PID_DIBCOM_STK8096GP                        0x1fa0
#define USB_PID_DIBCOM_NIM8096MD                        0x1fa8
#define USB_PID_DIBCOM_TFE8096P				0x1f9C
#define USB_PID_DIBCOM_ANCHOR_2135_COLD			0x2131
#define USB_PID_DIBCOM_STK7770P				0x1e80
#define USB_PID_DIBCOM_NIM7090				0x1bb2