Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 88b0b92b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2017-04-12' of... 

Merge tag 'drm-intel-fixes-2017-04-12' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes

drm/i915 fixes for v4.11-rc7

one rcu related fix, and a few GVT fixes.

* tag 'drm-intel-fixes-2017-04-12' of git://anongit.freedesktop.org/git/drm-intel:
  drm/i915: Don't call synchronize_rcu_expedited under struct_mutex
  drm/i915: Suspend GuC prior to GPU Reset during GEM suspend
  drm/i915/gvt: set the correct default value of CTX STATUS PTR
  drm/i915/gvt: Fix firmware loading interface for GVT-g golden HW state
  drm/i915: Use a dummy timeline name for a signaled fence
  drm/i915: Ironlake do_idle_maps w/a may be called w/o struct_mutex
  drm/i915/gvt: remove the redundant info NULL check
  drm/i915/gvt: adjust mem size for low resolution type
  drm/i915: Avoid lock dropping between rescheduling
  drm/i915/gvt: exclude cfg space from failsafe mode
  drm/i915/gvt: Activate/de-activate vGPU in mdev ops.
  drm/i915/execlists: Wrap tail pointer after reset tweaking
  drm/i915/perf: remove user triggerable warn
  drm/i915/perf: destroy stream on sample_flags mismatch
  drm/i915: Align "unfenced" tiled access on gen2, early gen3
parents 97d93f35 c053b5a5

drivers/gpu/drm/i915/gvt/cfg_space.c

+0 −3
Original line number Diff line number Diff line
@@ -285,9 +285,6 @@ int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset, 
{

	int ret;



	if (vgpu->failsafe)

		return 0;



	if (WARN_ON(bytes > 4))

		return -EINVAL;

drivers/gpu/drm/i915/gvt/execlist.c

+2 −1
Original line number Diff line number Diff line
@@ -775,7 +775,8 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu, int ring_id) 
			_EL_OFFSET_STATUS_PTR);



	ctx_status_ptr.dw = vgpu_vreg(vgpu, ctx_status_ptr_reg);

	ctx_status_ptr.read_ptr = ctx_status_ptr.write_ptr = 0x7;

	ctx_status_ptr.read_ptr = 0;

	ctx_status_ptr.write_ptr = 0x7;

	vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw;

}

drivers/gpu/drm/i915/gvt/firmware.c

+6 −3
Original line number Diff line number Diff line
@@ -75,11 +75,11 @@ static int expose_firmware_sysfs(struct intel_gvt *gvt) 
	struct gvt_firmware_header *h;

	void *firmware;

	void *p;

	unsigned long size;

	unsigned long size, crc32_start;

	int i;

	int ret;



	size = sizeof(*h) + info->mmio_size + info->cfg_space_size - 1;

	size = sizeof(*h) + info->mmio_size + info->cfg_space_size;

	firmware = vzalloc(size);

	if (!firmware)

		return -ENOMEM;
@@ -112,6 +112,9 @@ static int expose_firmware_sysfs(struct intel_gvt *gvt) 


	memcpy(gvt->firmware.mmio, p, info->mmio_size);



	crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;

	h->crc32 = crc32_le(0, firmware + crc32_start, size - crc32_start);



	firmware_attr.size = size;

	firmware_attr.private = firmware;
@@ -234,7 +237,7 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt) 


	firmware->mmio = mem;



	sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%04x.golden_hw_state",

	sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%02x.golden_hw_state",

		 GVT_FIRMWARE_PATH, pdev->vendor, pdev->device,

		 pdev->revision);

drivers/gpu/drm/i915/gvt/gvt.c

+2 −0
Original line number Diff line number Diff line
@@ -52,6 +52,8 @@ static const struct intel_gvt_ops intel_gvt_ops = { 
	.vgpu_create = intel_gvt_create_vgpu,

	.vgpu_destroy = intel_gvt_destroy_vgpu,

	.vgpu_reset = intel_gvt_reset_vgpu,

	.vgpu_activate = intel_gvt_activate_vgpu,

	.vgpu_deactivate = intel_gvt_deactivate_vgpu,

};



/**

drivers/gpu/drm/i915/gvt/gvt.h

+4 −1
Original line number Diff line number Diff line
@@ -382,7 +382,8 @@ void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu); 
void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,

				 unsigned int engine_mask);

void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu);



void intel_gvt_activate_vgpu(struct intel_vgpu *vgpu);

void intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu);



/* validating GM functions */

#define vgpu_gmadr_is_aperture(vgpu, gmadr) \
@@ -449,6 +450,8 @@ struct intel_gvt_ops { 
				struct intel_vgpu_type *);

	void (*vgpu_destroy)(struct intel_vgpu *);

	void (*vgpu_reset)(struct intel_vgpu *);

	void (*vgpu_activate)(struct intel_vgpu *);

	void (*vgpu_deactivate)(struct intel_vgpu *);

};