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Commit 88b02cf9 authored by Paul Mackerras's avatar Paul Mackerras
Browse files

KVM: PPC: Book3S: Treat VTB as a per-subcore register, not per-thread 



POWER8 has one virtual timebase (VTB) register per subcore, not one
per CPU thread.  The HV KVM code currently treats VTB as a per-thread
register, which can lead to spurious soft lockup messages from guests
which use the VTB as the time source for the soft lockup detector.
(CPUs before POWER8 did not have the VTB register.)

For HV KVM, this fixes the problem by making only the primary thread
in each virtual core save and restore the VTB value.  With this,
the VTB state becomes part of the kvmppc_vcore structure.  This
also means that "piggybacking" of multiple virtual cores onto one
subcore is not possible on POWER8, because then the virtual cores
would share a single VTB register.

PR KVM emulates a VTB register, which is per-vcpu because PR KVM
has no notion of CPU threads or SMT.  For PR KVM we move the VTB
state into the kvmppc_vcpu_book3s struct.

Cc: stable@vger.kernel.org # v3.14+
Reported-by: default avatarThomas Huth <thuth@redhat.com>
Tested-by: default avatarThomas Huth <thuth@redhat.com>
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
parent adad0d02

arch/powerpc/include/asm/kvm_book3s.h

+2 −0
Original line number Diff line number Diff line
@@ -101,6 +101,7 @@ struct kvmppc_vcore { 
	u32 arch_compat;

	ulong pcr;

	ulong dpdes;		/* doorbell state (POWER8) */

	ulong vtb;		/* virtual timebase */

	ulong conferring_threads;

	unsigned int halt_poll_ns;

};
@@ -119,6 +120,7 @@ struct kvmppc_vcpu_book3s { 
	u64 sdr1;

	u64 hior;

	u64 msr_mask;

	u64 vtb;

#ifdef CONFIG_PPC_BOOK3S_32

	u32 vsid_pool[VSID_POOL_SIZE];

	u32 vsid_next;

arch/powerpc/include/asm/kvm_host.h

+0 −1
Original line number Diff line number Diff line
@@ -475,7 +475,6 @@ struct kvm_vcpu_arch { 
	ulong purr;

	ulong spurr;

	ulong ic;

	ulong vtb;

	ulong dscr;

	ulong amr;

	ulong uamor;

arch/powerpc/kernel/asm-offsets.c

+1 −1
Original line number Diff line number Diff line
@@ -506,7 +506,6 @@ int main(void) 
	DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));

	DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));

	DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic));

	DEFINE(VCPU_VTB, offsetof(struct kvm_vcpu, arch.vtb));

	DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));

	DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));

	DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
@@ -557,6 +556,7 @@ int main(void) 
	DEFINE(VCORE_LPCR, offsetof(struct kvmppc_vcore, lpcr));

	DEFINE(VCORE_PCR, offsetof(struct kvmppc_vcore, pcr));

	DEFINE(VCORE_DPDES, offsetof(struct kvmppc_vcore, dpdes));

	DEFINE(VCORE_VTB, offsetof(struct kvmppc_vcore, vtb));

	DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));

	DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));

	DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));

arch/powerpc/kvm/book3s.c

+0 −6
Original line number Diff line number Diff line
@@ -599,9 +599,6 @@ int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 
		case KVM_REG_PPC_BESCR:

			*val = get_reg_val(id, vcpu->arch.bescr);

			break;

		case KVM_REG_PPC_VTB:

			*val = get_reg_val(id, vcpu->arch.vtb);

			break;

		case KVM_REG_PPC_IC:

			*val = get_reg_val(id, vcpu->arch.ic);

			break;
@@ -673,9 +670,6 @@ int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 
		case KVM_REG_PPC_BESCR:

			vcpu->arch.bescr = set_reg_val(id, *val);

			break;

		case KVM_REG_PPC_VTB:

			vcpu->arch.vtb = set_reg_val(id, *val);

			break;

		case KVM_REG_PPC_IC:

			vcpu->arch.ic = set_reg_val(id, *val);

			break;

arch/powerpc/kvm/book3s_emulate.c

+1 −1
Original line number Diff line number Diff line
@@ -579,7 +579,7 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val 
		*spr_val = vcpu->arch.spurr;

		break;

	case SPRN_VTB:

		*spr_val = vcpu->arch.vtb;

		*spr_val = to_book3s(vcpu)->vtb;

		break;

	case SPRN_IC:

		*spr_val = vcpu->arch.ic;