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Commit 8808a4d1 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add support for CPUFREQ HW debug and trace for LITO"

parents bc3b7775 b2407b92

bindings/devfreq/devfreq-qcom-fw.txt

+5 −0
Original line number Diff line number Diff line
@@ -23,8 +23,13 @@ Only for qcom,devfreq-fw: 
			  table.

			- "perf-base": address of register to request a

			  frequency.

			Optional register region:

			- "pstate-base": address of register to request

			  for current performance state (Mandatory if

			  qcom,support-panic-notifier property is added).

Optional properties:

- qcom,ftbl-row-size:    Size of the LUT row size.

- qcom,support-panic-notifier:	Support for panic notifier for l3-domain.



Example:

qcom/lito.dtsi

+12 −2
Original line number Diff line number Diff line
@@ -1724,12 +1724,22 @@ 
		#freq-domain-cells = <2>;

	};



	qcom,cpufreq-hw-debug@18320000 {

		compatible = "qcom,cpufreq-hw-debug-trace";

		reg = <0x18320000 0x800>;

		reg-names = "domain-top";

		qcom,freq-hw-domain = <&cpufreq_hw 0>, <&cpufreq_hw 1>,

					<&cpufreq_hw 2>;

	};



	qcom,devfreq-l3 {

		compatible = "qcom,devfreq-fw";

		reg = <0x18321000 0x4>, <0x18321110 0x500>, <0x18321920 0x4>;

		reg-names = "en-base", "ftbl-base", "perf-base";

		reg = <0x18321000 0x4>, <0x18321110 0x500>, <0x18321920 0x4>,

			<0x18321700 0x4>;

		reg-names = "en-base", "ftbl-base", "perf-base", "pstate-base";



		qcom,ftbl-row-size = <32>;

		qcom,support-panic-notifier;



		cpu0_l3: qcom,cpu0-cpu-l3-lat {

			compatible = "qcom,devfreq-fw-voter";