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Commit 87fb7410 authored by Bruce Allan's avatar Bruce Allan Committed by David S. Miller
Browse files

e1000e: 82579 SMBus address and LEDs incorrect after device reset 



Since the hardware is prevented from performing automatic PHY configuration
(the driver does it instead), the OEM_WRITE_ENABLE bit in the EXTCNF_CTRL
register will not get cleared preventing the SMBus address and the LED
configuration to be written to the PHY registers.  On 82579, do not check
the OEM_WRITE_ENABLE bit.

Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8395ae83

drivers/net/e1000e/ich8lan.c

+3 −3
Original line number Diff line number Diff line
@@ -990,9 +990,9 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) 
	cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK;

	cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;



	if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) &&

	    ((hw->mac.type == e1000_pchlan) ||

	     (hw->mac.type == e1000_pch2lan))) {

	if ((!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) &&

	    (hw->mac.type == e1000_pchlan)) ||

	     (hw->mac.type == e1000_pch2lan)) {

		/*

		 * HW configures the SMBus address and LEDs when the

		 * OEM and LCD Write Enable bits are set in the NVM.