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Commit 87bf742b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'exynos-drm-fixes-for-v4.17-rc5' of... 

Merge tag 'exynos-drm-fixes-for-v4.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes

Fixup pagefault issue of mixer driver
- it makes sure to check shadow register for interlace scan.
- it corrects chroma_addr[1], height and vertical position values.
And trivial cleanup
- it just removes duplicated drm_bridge_attach.

* tag 'exynos-drm-fixes-for-v4.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
  drm/exynos: hdmi: avoid duplicating drm_bridge_attach
  drm/exynos: mixer: avoid Oops in vp_video_buffer()
  drm/exynos/mixer: fix synchronization check in interlaced mode
parents dec60f3a 6f2db7dc

drivers/gpu/drm/exynos/exynos_hdmi.c

+0 −2
Original line number Diff line number Diff line
@@ -954,8 +954,6 @@ static int hdmi_create_connector(struct drm_encoder *encoder) 
	drm_mode_connector_attach_encoder(connector, encoder);



	if (hdata->bridge) {

		encoder->bridge = hdata->bridge;

		hdata->bridge->encoder = encoder;

		ret = drm_bridge_attach(encoder, hdata->bridge, NULL);

		if (ret)

			DRM_ERROR("Failed to attach bridge\n");

drivers/gpu/drm/exynos/exynos_mixer.c

+17 −5
Original line number Diff line number Diff line
@@ -473,7 +473,7 @@ static void vp_video_buffer(struct mixer_context *ctx, 
			chroma_addr[1] = chroma_addr[0] + 0x40;

		} else {

			luma_addr[1] = luma_addr[0] + fb->pitches[0];

			chroma_addr[1] = chroma_addr[0] + fb->pitches[0];

			chroma_addr[1] = chroma_addr[0] + fb->pitches[1];

		}

	} else {

		luma_addr[1] = 0;
@@ -482,6 +482,7 @@ static void vp_video_buffer(struct mixer_context *ctx, 


	spin_lock_irqsave(&ctx->reg_slock, flags);



	vp_reg_write(ctx, VP_SHADOW_UPDATE, 1);

	/* interlace or progressive scan mode */

	val = (test_bit(MXR_BIT_INTERLACE, &ctx->flags) ? ~0 : 0);

	vp_reg_writemask(ctx, VP_MODE, val, VP_MODE_LINE_SKIP);
@@ -495,21 +496,23 @@ static void vp_video_buffer(struct mixer_context *ctx, 
	vp_reg_write(ctx, VP_IMG_SIZE_Y, VP_IMG_HSIZE(fb->pitches[0]) |

		VP_IMG_VSIZE(fb->height));

	/* chroma plane for NV12/NV21 is half the height of the luma plane */

	vp_reg_write(ctx, VP_IMG_SIZE_C, VP_IMG_HSIZE(fb->pitches[0]) |

	vp_reg_write(ctx, VP_IMG_SIZE_C, VP_IMG_HSIZE(fb->pitches[1]) |

		VP_IMG_VSIZE(fb->height / 2));



	vp_reg_write(ctx, VP_SRC_WIDTH, state->src.w);

	vp_reg_write(ctx, VP_SRC_HEIGHT, state->src.h);

	vp_reg_write(ctx, VP_SRC_H_POSITION,

			VP_SRC_H_POSITION_VAL(state->src.x));

	vp_reg_write(ctx, VP_SRC_V_POSITION, state->src.y);



	vp_reg_write(ctx, VP_DST_WIDTH, state->crtc.w);

	vp_reg_write(ctx, VP_DST_H_POSITION, state->crtc.x);



	if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)) {

		vp_reg_write(ctx, VP_SRC_HEIGHT, state->src.h / 2);

		vp_reg_write(ctx, VP_SRC_V_POSITION, state->src.y / 2);

		vp_reg_write(ctx, VP_DST_HEIGHT, state->crtc.h / 2);

		vp_reg_write(ctx, VP_DST_V_POSITION, state->crtc.y / 2);

	} else {

		vp_reg_write(ctx, VP_SRC_HEIGHT, state->src.h);

		vp_reg_write(ctx, VP_SRC_V_POSITION, state->src.y);

		vp_reg_write(ctx, VP_DST_HEIGHT, state->crtc.h);

		vp_reg_write(ctx, VP_DST_V_POSITION, state->crtc.y);

	}
@@ -699,6 +702,15 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) 


		/* interlace scan need to check shadow register */

		if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)) {

			if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags) &&

			    vp_reg_read(ctx, VP_SHADOW_UPDATE))

				goto out;



			base = mixer_reg_read(ctx, MXR_CFG);

			shadow = mixer_reg_read(ctx, MXR_CFG_S);

			if (base != shadow)

				goto out;



			base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(0));

			shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(0));

			if (base != shadow)

drivers/gpu/drm/exynos/regs-mixer.h

+1 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ 
#define MXR_MO				0x0304

#define MXR_RESOLUTION			0x0310



#define MXR_CFG_S			0x2004

#define MXR_GRAPHIC0_BASE_S		0x2024

#define MXR_GRAPHIC1_BASE_S		0x2044