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Commit 872deb21 authored by Shyam Sundar S K's avatar Shyam Sundar S K Committed by Jon Mason
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NTB: Register and offset values fix for memory window 



Due to incorrect limit and translation register values, NTB link was
going down when the memory window was setup. Made appropriate changes
as per spec.

Fix limit register values for BAR1, which was overlapping
with the BAR23 address.

Signed-off-by: default avatarShyam Sundar S K <Shyam-sundar.S-k@amd.com>
Acked-by: default avatarAllen Hubbe <Allen.Hubbe@dell.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
parent e5b0d2d1

drivers/ntb/hw/amd/ntb_hw_amd.c

+4 −10
Original line number Diff line number Diff line
@@ -138,11 +138,11 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx, 
	base_addr = pci_resource_start(ndev->ntb.pdev, bar);



	if (bar != 1) {

		xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 3);

		limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 3);

		xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 2);

		limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 2);



		/* Set the limit if supported */

		limit = base_addr + size;

		limit = size;



		/* set and verify setting the translation address */

		write64(addr, peer_mmio + xlat_reg);
@@ -164,14 +164,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx, 
		xlat_reg = AMD_BAR1XLAT_OFFSET;

		limit_reg = AMD_BAR1LMT_OFFSET;



		/* split bar addr range must all be 32 bit */

		if (addr & (~0ull << 32))

			return -EINVAL;

		if ((addr + size) & (~0ull << 32))

			return -EINVAL;



		/* Set the limit if supported */

		limit = base_addr + size;

		limit = size;



		/* set and verify setting the translation address */

		write64(addr, peer_mmio + xlat_reg);