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Commit 870828e5 authored by James Morse's avatar James Morse Committed by Will Deacon
Browse files

arm64: kernel: Move config_sctlr_el1



Later patches need config_sctlr_el1 to set/clear bits in the sctlr_el1
register.

This patch moves this function into header a file.

Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent fc032421
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+0 −3
Original line number Diff line number Diff line
@@ -81,9 +81,6 @@
#define ID_AA64MMFR0_BIGEND(mmfr0)	\
	(((mmfr0) & ID_AA64MMFR0_BIGEND_MASK) >> ID_AA64MMFR0_BIGEND_SHIFT)

#define SCTLR_EL1_CP15BEN	(0x1 << 5)
#define SCTLR_EL1_SED		(0x1 << 8)

#ifndef __ASSEMBLY__

/*
+12 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@
#ifndef __ASM_SYSREG_H
#define __ASM_SYSREG_H

#define SCTLR_EL1_CP15BEN	(0x1 << 5)
#define SCTLR_EL1_SED		(0x1 << 8)

#define sys_reg(op0, op1, crn, crm, op2) \
	((((op0)-2)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))

@@ -55,6 +58,15 @@ asm(
"	.endm\n"
);

static inline void config_sctlr_el1(u32 clear, u32 set)
{
	u32 val;

	asm volatile("mrs %0, sctlr_el1" : "=r" (val));
	val &= ~clear;
	val |= set;
	asm volatile("msr sctlr_el1, %0" : : "r" (val));
}
#endif

#endif	/* __ASM_SYSREG_H */
+1 −10
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@

#include <asm/insn.h>
#include <asm/opcodes.h>
#include <asm/sysreg.h>
#include <asm/system_misc.h>
#include <asm/traps.h>
#include <asm/uaccess.h>
@@ -504,16 +505,6 @@ static int cp15barrier_handler(struct pt_regs *regs, u32 instr)
	return 0;
}

static inline void config_sctlr_el1(u32 clear, u32 set)
{
	u32 val;

	asm volatile("mrs %0, sctlr_el1" : "=r" (val));
	val &= ~clear;
	val |= set;
	asm volatile("msr sctlr_el1, %0" : : "r" (val));
}

static int cp15_barrier_set_hw_mode(bool enable)
{
	if (enable)