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Commit 86d811d8 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branches 'asoc/fix/davinci', 'asoc/fix/fsl-ssi',... 

Merge remote-tracking branches 'asoc/fix/davinci', 'asoc/fix/fsl-ssi', 'asoc/fix/rockchip' and 'asoc/fix/rt286' into asoc-linus
parents 44549e8f 823ecdd6 3cc6185b 7e885d21 b9c17f13

sound/soc/codecs/rt298.c

+18 −1
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <linux/i2c.h>

#include <linux/platform_device.h>

#include <linux/spi/spi.h>

#include <linux/dmi.h>

#include <linux/acpi.h>

#include <sound/core.h>

#include <sound/pcm.h>
@@ -1132,6 +1133,17 @@ static const struct acpi_device_id rt298_acpi_match[] = { 
};

MODULE_DEVICE_TABLE(acpi, rt298_acpi_match);



static const struct dmi_system_id force_combo_jack_table[] = {

	{

		.ident = "Intel Broxton P",

		.matches = {

			DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),

			DMI_MATCH(DMI_PRODUCT_NAME, "Broxton P")

		}

	},

	{ }

};



static int rt298_i2c_probe(struct i2c_client *i2c,

			   const struct i2c_device_id *id)

{
@@ -1184,11 +1196,16 @@ static int rt298_i2c_probe(struct i2c_client *i2c, 


	/* enable jack combo mode on supported devices */

	acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);

	if (acpiid) {

	if (acpiid && acpiid->driver_data) {

		rt298->pdata = *(struct rt298_platform_data *)

				acpiid->driver_data;

	}



	if (dmi_check_system(force_combo_jack_table)) {

		rt298->pdata.cbj_en = true;

		rt298->pdata.gpio2_en = false;

	}



	/* VREF Charging */

	regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80);

	regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860);

sound/soc/davinci/davinci-mcasp.c

+1 −1
Original line number Diff line number Diff line
@@ -489,7 +489,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, 
		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);



		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG,

			       ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR);

			       ACLKX | AFSX | ACLKR | AHCLKR | AFSR);

		mcasp->bclk_master = 0;

		break;

	default:

sound/soc/fsl/fsl_ssi.c

+1 −0
Original line number Diff line number Diff line
@@ -137,6 +137,7 @@ static bool fsl_ssi_volatile_reg(struct device *dev, unsigned int reg) 
	case CCSR_SSI_SACDAT:

	case CCSR_SSI_SATAG:

	case CCSR_SSI_SACCST:

	case CCSR_SSI_SOR:

		return true;

	default:

		return false;

sound/soc/rockchip/rockchip_i2s.c

+55 −32
Original line number Diff line number Diff line
@@ -34,6 +34,13 @@ struct rk_i2s_dev { 


	struct regmap *regmap;



/*

 * Used to indicate the tx/rx status.

 * I2S controller hopes to start the tx and rx together,

 * also to stop them when they are both try to stop.

*/

	bool tx_start;

	bool rx_start;

	bool is_master_mode;

};
@@ -75,24 +82,31 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) 
				   I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE);



		regmap_update_bits(i2s->regmap, I2S_XFER,

				   I2S_XFER_TXS_START,

				   I2S_XFER_TXS_START);

				   I2S_XFER_TXS_START | I2S_XFER_RXS_START,

				   I2S_XFER_TXS_START | I2S_XFER_RXS_START);



		i2s->tx_start = true;

	} else {

		i2s->tx_start = false;



		regmap_update_bits(i2s->regmap, I2S_DMACR,

				   I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE);



		if (!i2s->rx_start) {

			regmap_update_bits(i2s->regmap, I2S_XFER,

				   I2S_XFER_TXS_START,

				   I2S_XFER_TXS_STOP);

					   I2S_XFER_TXS_START |

					   I2S_XFER_RXS_START,

					   I2S_XFER_TXS_STOP |

					   I2S_XFER_RXS_STOP);



			regmap_update_bits(i2s->regmap, I2S_CLR,

				   I2S_CLR_TXC,

				   I2S_CLR_TXC);

					   I2S_CLR_TXC | I2S_CLR_RXC,

					   I2S_CLR_TXC | I2S_CLR_RXC);



			regmap_read(i2s->regmap, I2S_CLR, &val);



			/* Should wait for clear operation to finish */

		while (val & I2S_CLR_TXC) {

			while (val) {

				regmap_read(i2s->regmap, I2S_CLR, &val);

				retry--;

				if (!retry) {
@@ -102,6 +116,7 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) 
			}

		}

	}

}



static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)

{
@@ -113,24 +128,31 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) 
				   I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE);



		regmap_update_bits(i2s->regmap, I2S_XFER,

				   I2S_XFER_RXS_START,

				   I2S_XFER_RXS_START);

				   I2S_XFER_TXS_START | I2S_XFER_RXS_START,

				   I2S_XFER_TXS_START | I2S_XFER_RXS_START);



		i2s->rx_start = true;

	} else {

		i2s->rx_start = false;



		regmap_update_bits(i2s->regmap, I2S_DMACR,

				   I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE);



		if (!i2s->tx_start) {

			regmap_update_bits(i2s->regmap, I2S_XFER,

					   I2S_XFER_TXS_START |

					   I2S_XFER_RXS_START,

					   I2S_XFER_TXS_STOP |

					   I2S_XFER_RXS_STOP);



			regmap_update_bits(i2s->regmap, I2S_CLR,

				   I2S_CLR_RXC,

				   I2S_CLR_RXC);

					   I2S_CLR_TXC | I2S_CLR_RXC,

					   I2S_CLR_TXC | I2S_CLR_RXC);



			regmap_read(i2s->regmap, I2S_CLR, &val);



			/* Should wait for clear operation to finish */

		while (val & I2S_CLR_RXC) {

			while (val) {

				regmap_read(i2s->regmap, I2S_CLR, &val);

				retry--;

				if (!retry) {
@@ -140,6 +162,7 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) 
			}

		}

	}

}



static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai,

				unsigned int fmt)