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Commit 8694e4da authored by Christoffer Dall's avatar Christoffer Dall
Browse files

KVM: arm/arm64: Remove struct vgic_irq pending field 

One of the goals behind the VGIC redesign was to get rid of cached or
intermediate state in the data structures, but we decided to allow
ourselves to precompute the pending value of an IRQ based on the line
level and pending latch state.  However, this has now become difficult
to base proper GICv3 save/restore on, because there is a potential to
modify the pending state without knowing if an interrupt is edge or
level configured.

See the following post and related message for more background:
https://lists.cs.columbia.edu/pipermail/kvmarm/2017-January/023195.html



This commit gets rid of the precomputed pending field in favor of a
function that calculates the value when needed, irq_is_pending().

The soft_pending field is renamed to pending_latch to represent that
this latch is the equivalent hardware latch which gets manipulated by
the input signal for edge-triggered interrupts and when writing to the
SPENDR/CPENDR registers.

After this commit save/restore code should be able to simply restore the
pending_latch state, line_level state, and config state in any order and
get the desired result.

Reviewed-by: default avatarAndre Przywara <andre.przywara@arm.com>
Reviewed-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Tested-by: default avatarAndre Przywara <andre.przywara@arm.com>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
parent 7a308bb3

include/kvm/arm_vgic.h

+3 −2
Original line number Diff line number Diff line
@@ -101,9 +101,10 @@ struct vgic_irq { 
					 */



	u32 intid;			/* Guest visible INTID */

	bool pending;

	bool line_level;		/* Level only */

	bool soft_pending;		/* Level only */

	bool pending_latch;		/* The pending latch state used to calculate

					 * the pending state for both level

					 * and edge triggered IRQs. */

	bool active;			/* not used for LPIs */

	bool enabled;

	bool hw;			/* Tied to HW IRQ */

virt/kvm/arm/vgic/vgic-its.c

+3 −3
Original line number Diff line number Diff line
@@ -350,7 +350,7 @@ static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) 


		irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);

		spin_lock(&irq->irq_lock);

		irq->pending = pendmask & (1U << bit_nr);

		irq->pending_latch = pendmask & (1U << bit_nr);

		vgic_queue_irq_unlock(vcpu->kvm, irq);

		vgic_put_irq(vcpu->kvm, irq);

	}
@@ -465,7 +465,7 @@ static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, 
		return -EBUSY;



	spin_lock(&itte->irq->irq_lock);

	itte->irq->pending = true;

	itte->irq->pending_latch = true;

	vgic_queue_irq_unlock(kvm, itte->irq);



	return 0;
@@ -913,7 +913,7 @@ static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its, 
	if (!itte)

		return E_ITS_CLEAR_UNMAPPED_INTERRUPT;



	itte->irq->pending = false;

	itte->irq->pending_latch = false;



	return 0;

}

virt/kvm/arm/vgic/vgic-mmio-v2.c

+3 −3
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ static void vgic_mmio_write_sgir(struct kvm_vcpu *source_vcpu, 
		irq = vgic_get_irq(source_vcpu->kvm, vcpu, intid);



		spin_lock(&irq->irq_lock);

		irq->pending = true;

		irq->pending_latch = true;

		irq->source |= 1U << source_vcpu->vcpu_id;



		vgic_queue_irq_unlock(source_vcpu->kvm, irq);
@@ -182,7 +182,7 @@ static void vgic_mmio_write_sgipendc(struct kvm_vcpu *vcpu, 


		irq->source &= ~((val >> (i * 8)) & 0xff);

		if (!irq->source)

			irq->pending = false;

			irq->pending_latch = false;



		spin_unlock(&irq->irq_lock);

		vgic_put_irq(vcpu->kvm, irq);
@@ -204,7 +204,7 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu, 
		irq->source |= (val >> (i * 8)) & 0xff;



		if (irq->source) {

			irq->pending = true;

			irq->pending_latch = true;

			vgic_queue_irq_unlock(vcpu->kvm, irq);

		} else {

			spin_unlock(&irq->irq_lock);

virt/kvm/arm/vgic/vgic-mmio-v3.c

+1 −1
Original line number Diff line number Diff line
@@ -646,7 +646,7 @@ void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg) 
		irq = vgic_get_irq(vcpu->kvm, c_vcpu, sgi);



		spin_lock(&irq->irq_lock);

		irq->pending = true;

		irq->pending_latch = true;



		vgic_queue_irq_unlock(vcpu->kvm, irq);

		vgic_put_irq(vcpu->kvm, irq);

virt/kvm/arm/vgic/vgic-mmio.c

+5 −14
Original line number Diff line number Diff line
@@ -111,7 +111,7 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu, 
	for (i = 0; i < len * 8; i++) {

		struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);



		if (irq->pending)

		if (irq_is_pending(irq))

			value |= (1U << i);



		vgic_put_irq(vcpu->kvm, irq);
@@ -131,9 +131,7 @@ void vgic_mmio_write_spending(struct kvm_vcpu *vcpu, 
		struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);



		spin_lock(&irq->irq_lock);

		irq->pending = true;

		if (irq->config == VGIC_CONFIG_LEVEL)

			irq->soft_pending = true;

		irq->pending_latch = true;



		vgic_queue_irq_unlock(vcpu->kvm, irq);

		vgic_put_irq(vcpu->kvm, irq);
@@ -152,12 +150,7 @@ void vgic_mmio_write_cpending(struct kvm_vcpu *vcpu, 


		spin_lock(&irq->irq_lock);



		if (irq->config == VGIC_CONFIG_LEVEL) {

			irq->soft_pending = false;

			irq->pending = irq->line_level;

		} else {

			irq->pending = false;

		}

		irq->pending_latch = false;



		spin_unlock(&irq->irq_lock);

		vgic_put_irq(vcpu->kvm, irq);
@@ -359,12 +352,10 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu, 
		irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);

		spin_lock(&irq->irq_lock);



		if (test_bit(i * 2 + 1, &val)) {

		if (test_bit(i * 2 + 1, &val))

			irq->config = VGIC_CONFIG_EDGE;

		} else {

		else

			irq->config = VGIC_CONFIG_LEVEL;

			irq->pending = irq->line_level | irq->soft_pending;

		}



		spin_unlock(&irq->irq_lock);

		vgic_put_irq(vcpu->kvm, irq);