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Commit 85a9419a authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Lee Jones
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mfd: intel-lpss: Try to enable Memory-Write-Invalidate



Enable MWI mechanism if PCI bus master supports it.

It might be potential benefit in some cases. Documentation [1] says that
standard Memory Write might supply more current data than in the CPU modified
cache line and "trashing a line in the cache may trash some data that is more
current that in the memory line". This allows to avoid potential retries and
other performance degradation issues on the bus.

[1] PCI System Architecture, 4th edition, ISBN: 0-201-30974-2, pp.117-119.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent c5e589a1
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+1 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ static int intel_lpss_pci_probe(struct pci_dev *pdev,

	/* Probably it is enough to set this for iDMA capable devices only */
	pci_set_master(pdev);
	pci_try_set_mwi(pdev);

	ret = intel_lpss_probe(&pdev->dev, info);
	if (ret)