Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 858576bd authored by Harald Welte's avatar Harald Welte Committed by Herbert Xu
Browse files

hwrng: via_rng - Support VIA Nano hardware RNG



The VIA Nano CPU supports the same XSTORE instruction based RNG,
but it lacks the MSR present in earlier CPUs.

Signed-off-by: default avatarHarald Welte <HaraldWelte@viatech.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 608d1cd5
Loading
Loading
Loading
Loading
+13 −0
Original line number Diff line number Diff line
@@ -132,6 +132,19 @@ static int via_rng_init(struct hwrng *rng)
	struct cpuinfo_x86 *c = &cpu_data(0);
	u32 lo, hi, old_lo;

	/* VIA Nano CPUs don't have the MSR_VIA_RNG anymore.  The RNG
	 * is always enabled if CPUID rng_en is set.  There is no
	 * RNG configuration like it used to be the case in this
	 * register */
	if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
		if (!cpu_has_xstore_enabled) {
			printk(KERN_ERR PFX "can't enable hardware RNG "
				"if XSTORE is not enabled\n");
			return -ENODEV;
		}
		return 0;
	}

	/* Control the RNG via MSR.  Tread lightly and pay very close
	 * close attention to values written, as the reserved fields
	 * are documented to be "undefined and unpredictable"; but it