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Commit 85593b75 authored by Thierry Reding's avatar Thierry Reding
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arm64: tegra: Add FUSE block on Tegra186



The FUSE register block found on Tegra186 SoCs encodes various settings,
such as calibration data for other blocks.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 94e25dc3
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+7 −0
Original line number Diff line number Diff line
@@ -265,6 +265,13 @@
		status = "disabled";
	};

	fuse@3820000 {
		compatible = "nvidia,tegra186-efuse";
		reg = <0x0 0x03820000 0x0 0x10000>;
		clocks = <&bpmp TEGRA186_CLK_FUSE>;
		clock-names = "fuse";
	};

	gic: interrupt-controller@3881000 {
		compatible = "arm,gic-400";
		#interrupt-cells = <3>;