Merge branch 'next' into v3.1-rc4 (8516f52f) · Commits · e / devices / android_kernel_fairphone_FP4

arch/arm/include/asm/hardware/pl080.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -21,6 +21,9 @@
		* OneNAND features.
		*/

		#ifndef ASM_PL080_H
		#define ASM_PL080_H

		#define PL080_INT_STATUS (0x00)
		#define PL080_TC_STATUS (0x04)
		#define PL080_TC_CLEAR (0x08)
		@@ -138,3 +141,4 @@ struct pl080s_lli {
		u32 control1;
		};

		#endif /* ASM_PL080_H */

drivers/dma/amba-pl08x.c

+188 −257

File changed.

Preview size limit exceeded, changes collapsed.

drivers/dma/at_hdmac.c

+125 −34

File changed.

Preview size limit exceeded, changes collapsed.

drivers/dma/at_hdmac_regs.h

+24 −0

Original line number	Diff line number	Diff line
		@@ -204,6 +204,9 @@ enum atc_status {
		* @status: transmit status information from irq/prep* functions
		* to tasklet (use atomic operations)
		* @tasklet: bottom half to finish transaction work
		* @save_cfg: configuration register that is saved on suspend/resume cycle
		* @save_dscr: for cyclic operations, preserve next descriptor address in
		* the cyclic list on suspend/resume cycle
		* @lock: serializes enqueue/dequeue operations to descriptors lists
		* @completed_cookie: identifier for the most recently completed operation
		* @active_list: list of descriptors dmaengine is being running on
		@@ -218,6 +221,8 @@ struct at_dma_chan {
		u8 mask;
		unsigned long status;
		struct tasklet_struct tasklet;
		u32 save_cfg;
		u32 save_dscr;

		spinlock_t lock;

		@@ -248,6 +253,7 @@ static inline struct at_dma_chan to_at_dma_chan(struct dma_chan dchan)
		* @chan_common: common dmaengine dma_device object members
		* @ch_regs: memory mapped register base
		* @clk: dma controller clock
		* @save_imr: interrupt mask register that is saved on suspend/resume cycle
		* @all_chan_mask: all channels availlable in a mask
		* @dma_desc_pool: base of DMA descriptor region (DMA address)
		* @chan: channels table to store at_dma_chan structures
		@@ -256,6 +262,7 @@ struct at_dma {
		struct dma_device dma_common;
		void __iomem *regs;
		struct clk *clk;
		u32 save_imr;

		u8 all_chan_mask;

		@@ -355,6 +362,23 @@ static inline int atc_chan_is_enabled(struct at_dma_chan *atchan)
		return !!(dma_readl(atdma, CHSR) & atchan->mask);
		}

		/**
		* atc_chan_is_paused - test channel pause/resume status
		* @atchan: channel we want to test status
		*/
		static inline int atc_chan_is_paused(struct at_dma_chan *atchan)
		{
		return test_bit(ATC_IS_PAUSED, &atchan->status);
		}

		/**
		* atc_chan_is_cyclic - test if given channel has cyclic property set
		* @atchan: channel we want to test status
		*/
		static inline int atc_chan_is_cyclic(struct at_dma_chan *atchan)
		{
		return test_bit(ATC_IS_CYCLIC, &atchan->status);
		}

		/**
		* set_desc_eol - set end-of-link to descriptor so it will end transfer

drivers/dma/dmatest.c

+21 −2

Original line number	Diff line number	Diff line
		@@ -10,6 +10,7 @@
		#include <linux/delay.h>
		#include <linux/dma-mapping.h>
		#include <linux/dmaengine.h>
		#include <linux/freezer.h>
		#include <linux/init.h>
		#include <linux/kthread.h>
		#include <linux/module.h>
		@@ -251,6 +252,7 @@ static int dmatest_func(void *data)
		int i;

		thread_name = current->comm;
		set_freezable_with_signal();

		ret = -ENOMEM;

		@@ -305,7 +307,8 @@ static int dmatest_func(void *data)
		dma_addr_t dma_srcs[src_cnt];
		dma_addr_t dma_dsts[dst_cnt];
		struct completion cmp;
		unsigned long tmo = msecs_to_jiffies(timeout);
		unsigned long start, tmo, end = 0 /* compiler... */;
		bool reload = true;
		u8 align = 0;

		total_tests++;
		@@ -404,7 +407,17 @@ static int dmatest_func(void *data)
		}
		dma_async_issue_pending(chan);

		tmo = wait_for_completion_timeout(&cmp, tmo);
		do {
		start = jiffies;
		if (reload)
		end = start + msecs_to_jiffies(timeout);
		else if (end <= start)
		end = start + 1;
		tmo = wait_for_completion_interruptible_timeout(&cmp,
		end - start);
		reload = try_to_freeze();
		} while (tmo == -ERESTARTSYS);

		status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);

		if (tmo == 0) {
		@@ -477,6 +490,8 @@ static int dmatest_func(void *data)
		pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
		thread_name, total_tests, failed_tests, ret);

		/* terminate all transfers on specified channels */
		chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
		if (iterations > 0)
		while (!kthread_should_stop()) {
		DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
		@@ -499,6 +514,10 @@ static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
		list_del(&thread->node);
		kfree(thread);
		}

		/* terminate all transfers on specified channels */
		dtc->chan->device->device_control(dtc->chan, DMA_TERMINATE_ALL, 0);

		kfree(dtc);
		}