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Commit 84680815 authored by Priyanka Gujjula's avatar Priyanka Gujjula
Browse files

msm: vidc: Disable DCVS for 720p@240 enc on lagoon 



1. Camera creates an internal batch based on hfr/preview_fps
   i.e 8 for 240fps usecases. Hence camera sends 8 ETB's in
   single shot and then waits for 25-30ms, which causes the
   side effect at FW. Either FW is always waiting for input
   or loaded with input buffers.
2. Being a HFR use case (<480), DCVS max_threshold for this
   usecase (i.e max number of input buffers that can held by
   encoder) is 8, due to which 20% of the usecase runs in
   DCVS high corner. For this use case, DCVS_high is turbo.
   Since DDR runs at Nominal and there would not be much
   savings when clocks runs at SVS_L1, disabling DCVS for
   this usecase on lagoon.

Change-Id: Ifcc7da11cf4347655dbf3e39e41b4bceb5854167
Signed-off-by: default avatarPriyanka Gujjula <pgujjula@codeaurora.org>
parent 86dc23c3

msm/vidc/msm_vidc_clocks.c

+10 −1
Original line number Diff line number Diff line
@@ -1072,10 +1072,18 @@ int msm_comm_scale_clocks_and_bus(struct msm_vidc_inst *inst, bool do_bw_calc) 


int msm_dcvs_try_enable(struct msm_vidc_inst *inst)

{

	bool disable_hfr_dcvs = false;



	if (!inst || !inst->core) {

		d_vpr_e("%s: Invalid args: %pK\n", __func__, inst);

		return -EINVAL;

	}

	if (inst->core->platform_data->vpu_ver == VPU_VERSION_IRIS2_1) {

		/* 720p@240 encode */

		if (is_encode_session(inst) && msm_vidc_get_fps(inst) >= 240

			&& msm_vidc_get_mbs_per_frame(inst) >= 3600)

			disable_hfr_dcvs = true;

	}



	inst->clk_data.dcvs_mode =

		!(msm_vidc_clock_voting ||
@@ -1085,7 +1093,8 @@ int msm_dcvs_try_enable(struct msm_vidc_inst *inst) 
			inst->clk_data.low_latency_mode ||

			inst->batch.enable ||

			is_turbo_session(inst) ||

		  inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ);

			inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ ||

			disable_hfr_dcvs);



	s_vpr_hp(inst->sid, "DCVS %s: %pK\n",

		inst->clk_data.dcvs_mode ? "enabled" : "disabled", inst);