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Commit 84550121 authored by Michael S. Tsirkin's avatar Michael S. Tsirkin
Browse files

tile: switch to GENERIC_PCI_IOMAP 



tile now has working stubs for ioport_map and ioremap
such that the generic pci_iomap will DTRT: cast to
pointer on memory and return NULL and log message on IO map.

Switch it over to GENERIC_PCI_IOMAP.

Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
parent 8593dd37

arch/tile/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -321,6 +321,7 @@ config PCI 
	bool "PCI support"

	default y

	select PCI_DOMAINS

	select GENERIC_PCI_IOMAP

	---help---

	  Enable PCI root complex support, so PCIe endpoint devices can

	  be attached to the Tile chip.  Many, but not all, PCI devices

arch/tile/include/asm/pci.h

+1 −1
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#define _ASM_TILE_PCI_H



#include <linux/pci.h>

#include <asm-generic/pci_iomap.h>



/*

 * Structure of a PCI controller (host bridge)
@@ -49,7 +50,6 @@ struct pci_controller { 
int __devinit tile_pci_init(void);

int __devinit pcibios_init(void);



void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);

static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {}



void __devinit pcibios_fixup_bus(struct pci_bus *bus);

arch/tile/kernel/pci.c

+0 −21
Original line number Diff line number Diff line
@@ -465,27 +465,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) 
	return 0;

}



void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)

{

	unsigned long start = pci_resource_start(dev, bar);

	unsigned long len = pci_resource_len(dev, bar);

	unsigned long flags = pci_resource_flags(dev, bar);



	if (!len)

		return NULL;

	if (max && len > max)

		len = max;



	if (!(flags & IORESOURCE_MEM)) {

		pr_info("PCI: Trying to map invalid resource %#lx\n", flags);

		start = 0;

	}



	return (void __iomem *)start;

}

EXPORT_SYMBOL(pci_iomap);





/****************************************************************

 *

 * Tile PCI config space read/write routines