Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 842dfc11 authored by Manuel Lauss's avatar Manuel Lauss Committed by Ralf Baechle
Browse files

MIPS: Fix build with binutils 2.24.51+



Starting with version 2.24.51.20140728 MIPS binutils complain loudly
about mixing soft-float and hard-float object files, leading to this
build failure since GCC is invoked with "-msoft-float" on MIPS:

{standard input}: Warning: .gnu_attribute 4,3 requires `softfloat'
  LD      arch/mips/alchemy/common/built-in.o
mipsel-softfloat-linux-gnu-ld: Warning: arch/mips/alchemy/common/built-in.o
 uses -msoft-float (set by arch/mips/alchemy/common/prom.o),
 arch/mips/alchemy/common/sleeper.o uses -mhard-float

To fix this, we detect if GAS is new enough to support "-msoft-float" command
option, and if it does, we can let GCC pass it to GAS;  but then we also need
to sprinkle the files which make use of floating point registers with the
necessary ".set hardfloat" directives.

Signed-off-by: default avatarManuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: Markos Chandras <Markos.Chandras@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8355/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 491a48aa
Loading
Loading
Loading
Loading
+9 −0
Original line number Diff line number Diff line
@@ -93,6 +93,15 @@ LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
KBUILD_AFLAGS_MODULE		+= -mlong-calls
KBUILD_CFLAGS_MODULE		+= -mlong-calls

#
# pass -msoft-float to GAS if it supports it.  However on newer binutils
# (specifically newer than 2.24.51.20140728) we then also need to explicitly
# set ".set hardfloat" in all files which manipulate floating point registers.
#
ifneq ($(call as-option,-Wa$(comma)-msoft-float,),)
	cflags-y		+= -DGAS_HAS_SET_HARDFLOAT -Wa,-msoft-float
endif

cflags-y += -ffreestanding

#
+6 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@
#include <asm/mipsregs.h>

	.macro	fpu_save_single thread tmp=t0
	.set push
	SET_HARDFLOAT
	cfc1	\tmp,  fcr31
	swc1	$f0,  THREAD_FPR0_LS64(\thread)
	swc1	$f1,  THREAD_FPR1_LS64(\thread)
@@ -47,9 +49,12 @@
	swc1	$f30, THREAD_FPR30_LS64(\thread)
	swc1	$f31, THREAD_FPR31_LS64(\thread)
	sw	\tmp, THREAD_FCR31(\thread)
	.set pop
	.endm

	.macro	fpu_restore_single thread tmp=t0
	.set push
	SET_HARDFLOAT
	lw	\tmp, THREAD_FCR31(\thread)
	lwc1	$f0,  THREAD_FPR0_LS64(\thread)
	lwc1	$f1,  THREAD_FPR1_LS64(\thread)
@@ -84,6 +89,7 @@
	lwc1	$f30, THREAD_FPR30_LS64(\thread)
	lwc1	$f31, THREAD_FPR31_LS64(\thread)
	ctc1	\tmp, fcr31
	.set pop
	.endm

	.macro	cpu_save_nonscratch thread
+18 −0
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@
#endif /* CONFIG_CPU_MIPSR2 */

	.macro	fpu_save_16even thread tmp=t0
	.set	push
	SET_HARDFLOAT
	cfc1	\tmp, fcr31
	sdc1	$f0,  THREAD_FPR0_LS64(\thread)
	sdc1	$f2,  THREAD_FPR2_LS64(\thread)
@@ -75,11 +77,13 @@
	sdc1	$f28, THREAD_FPR28_LS64(\thread)
	sdc1	$f30, THREAD_FPR30_LS64(\thread)
	sw	\tmp, THREAD_FCR31(\thread)
	.set	pop
	.endm

	.macro	fpu_save_16odd thread
	.set	push
	.set	mips64r2
	SET_HARDFLOAT
	sdc1	$f1,  THREAD_FPR1_LS64(\thread)
	sdc1	$f3,  THREAD_FPR3_LS64(\thread)
	sdc1	$f5,  THREAD_FPR5_LS64(\thread)
@@ -110,6 +114,8 @@
	.endm

	.macro	fpu_restore_16even thread tmp=t0
	.set	push
	SET_HARDFLOAT
	lw	\tmp, THREAD_FCR31(\thread)
	ldc1	$f0,  THREAD_FPR0_LS64(\thread)
	ldc1	$f2,  THREAD_FPR2_LS64(\thread)
@@ -133,6 +139,7 @@
	.macro	fpu_restore_16odd thread
	.set	push
	.set	mips64r2
	SET_HARDFLOAT
	ldc1	$f1,  THREAD_FPR1_LS64(\thread)
	ldc1	$f3,  THREAD_FPR3_LS64(\thread)
	ldc1	$f5,  THREAD_FPR5_LS64(\thread)
@@ -277,6 +284,7 @@
	.macro	cfcmsa	rd, cs
	.set	push
	.set	noat
	SET_HARDFLOAT
	.insn
	.word	CFC_MSA_INSN | (\cs << 11)
	move	\rd, $1
@@ -286,6 +294,7 @@
	.macro	ctcmsa	cd, rs
	.set	push
	.set	noat
	SET_HARDFLOAT
	move	$1, \rs
	.word	CTC_MSA_INSN | (\cd << 6)
	.set	pop
@@ -294,6 +303,7 @@
	.macro	ld_d	wd, off, base
	.set	push
	.set	noat
	SET_HARDFLOAT
	add	$1, \base, \off
	.word	LDD_MSA_INSN | (\wd << 6)
	.set	pop
@@ -302,6 +312,7 @@
	.macro	st_d	wd, off, base
	.set	push
	.set	noat
	SET_HARDFLOAT
	add	$1, \base, \off
	.word	STD_MSA_INSN | (\wd << 6)
	.set	pop
@@ -310,6 +321,7 @@
	.macro	copy_u_w	rd, ws, n
	.set	push
	.set	noat
	SET_HARDFLOAT
	.insn
	.word	COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
	/* move triggers an assembler bug... */
@@ -320,6 +332,7 @@
	.macro	copy_u_d	rd, ws, n
	.set	push
	.set	noat
	SET_HARDFLOAT
	.insn
	.word	COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
	/* move triggers an assembler bug... */
@@ -330,6 +343,7 @@
	.macro	insert_w	wd, n, rs
	.set	push
	.set	noat
	SET_HARDFLOAT
	/* move triggers an assembler bug... */
	or	$1, \rs, zero
	.word	INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -339,6 +353,7 @@
	.macro	insert_d	wd, n, rs
	.set	push
	.set	noat
	SET_HARDFLOAT
	/* move triggers an assembler bug... */
	or	$1, \rs, zero
	.word	INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -381,6 +396,7 @@
	st_d	31, THREAD_FPR31, \thread
	.set	push
	.set	noat
	SET_HARDFLOAT
	cfcmsa	$1, MSA_CSR
	sw	$1, THREAD_MSA_CSR(\thread)
	.set	pop
@@ -389,6 +405,7 @@
	.macro	msa_restore_all	thread
	.set	push
	.set	noat
	SET_HARDFLOAT
	lw	$1, THREAD_MSA_CSR(\thread)
	ctcmsa	MSA_CSR, $1
	.set	pop
@@ -441,6 +458,7 @@
	.macro	msa_init_all_upper
	.set	push
	.set	noat
	SET_HARDFLOAT
	not	$1, zero
	msa_init_upper	0
	.set	pop
+14 −0
Original line number Diff line number Diff line
@@ -14,6 +14,20 @@

#include <asm/sgidefs.h>

/*
 * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
 * hardfloat and softfloat object files.  The kernel build uses soft-float by
 * default, so we also need to pass -msoft-float along to GAS if it supports it.
 * But this in turn causes assembler errors in files which access hardfloat
 * registers.  We detect if GAS supports "-msoft-float" in the Makefile and
 * explicitly put ".set hardfloat" where floating point registers are touched.
 */
#ifdef GAS_HAS_SET_HARDFLOAT
#define SET_HARDFLOAT .set hardfloat
#else
#define SET_HARDFLOAT
#endif

#if _MIPS_SIM == _MIPS_SIM_ABI32

/*
+2 −2
Original line number Diff line number Diff line
@@ -145,8 +145,8 @@ static inline void lose_fpu(int save)
	if (is_msa_enabled()) {
		if (save) {
			save_msa(current);
			asm volatile("cfc1 %0, $31"
				: "=r"(current->thread.fpu.fcr31));
			current->thread.fpu.fcr31 =
					read_32bit_cp1_register(CP1_STATUS);
		}
		disable_msa();
		clear_thread_flag(TIF_USEDMSA);
Loading