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Commit 83f5fa3c authored by Jilai Wang's avatar Jilai Wang
Browse files

ARM: dts: msm: Add mailbox controller support for NPU 

The mailbox controller implemented in NPU works as a bridge
between ipcc_mproc mailbox controller and its clients. It is
required because npu driver needs to control when IPCC irq can
be sent to NPUQ6.

Change-Id: I2987c1820169577c6985fa922e2401f865f13b7b
parent ea2bf133

qcom/ipcc-test.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -33,6 +33,6 @@ 
		compatible = "qcom,ipcc-self-ping";

		interrupts-extended = <&ipcc_mproc IPCC_CLIENT_NPU

				IPCC_MPROC_SIGNAL_PING IRQ_TYPE_LEVEL_HIGH>;

		mboxes = <&ipcc_mproc IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_PING>;

		mboxes = <&msm_npu IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_PING>;

	};

};

qcom/kona-npu.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -81,6 +81,14 @@ 
		qcom,proxy-reg-names ="vdd", "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		#cooling-cells = <2>;

		mboxes = <&ipcc_mproc IPCC_CLIENT_NPU

				IPCC_MPROC_SIGNAL_GLINK_QMP>,

			<&ipcc_mproc IPCC_CLIENT_NPU

				IPCC_MPROC_SIGNAL_SMP2P>,

			<&ipcc_mproc IPCC_CLIENT_NPU

				IPCC_MPROC_SIGNAL_PING>;

		mbox-names = "ipcc-glink", "ipcc-smp2p", "ipcc-ping";

		#mbox-cells = <2>;

		qcom,npu-pwrlevels {

			#address-cells = <1>;

			#size-cells = <0>;

qcom/kona-smp2p.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -114,7 +114,7 @@ 
		interrupt-parent = <&ipcc_mproc>;

		interrupts = <IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_SMP2P

			      IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc_mproc IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_SMP2P>;

		mboxes = <&msm_npu IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_SMP2P>;

		qcom,local-pid = <0>;

		qcom,remote-pid = <10>;

qcom/kona.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -3672,7 +3672,7 @@ 
		glink_npu: npu {

			qcom,remote-pid = <10>;

			transport = "smem";

			mboxes = <&ipcc_mproc IPCC_CLIENT_NPU

			mboxes = <&msm_npu IPCC_CLIENT_NPU

				  IPCC_MPROC_SIGNAL_GLINK_QMP>;

			mbox-names = "npu_smem";

			interrupt-parent = <&ipcc_mproc>;