Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 83c5fda7 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Pass the cdclk state to the set_cdclk() functions



Rather than passing all the different parameters (cdclk,vco so
far) sparately to the set_cdclk() functions, just pass the
entire cdclk state.

v2: Deal with churn
v3: Drop the usless .ref assignment (Ander)

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarAnder Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170120182205.8141-11-ville.syrjala@linux.intel.com
parent 3d5dbb10
Loading
Loading
Loading
Loading
+48 −30
Original line number Diff line number Diff line
@@ -485,8 +485,10 @@ static void vlv_program_pfi_credits(struct drm_i915_private *dev_priv)
	WARN_ON(I915_READ(GCI_CONTROL) & PFI_CREDIT_RESEND);
}

static void vlv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
static void vlv_set_cdclk(struct drm_i915_private *dev_priv,
			  const struct intel_cdclk_state *cdclk_state)
{
	int cdclk = cdclk_state->cdclk;
	u32 val, cmd;

	if (cdclk >= 320000) /* jump to highest voltage for 400MHz too */
@@ -547,8 +549,10 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
	intel_update_cdclk(dev_priv);
}

static void chv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
static void chv_set_cdclk(struct drm_i915_private *dev_priv,
			  const struct intel_cdclk_state *cdclk_state)
{
	int cdclk = cdclk_state->cdclk;
	u32 val, cmd;

	switch (cdclk) {
@@ -616,8 +620,10 @@ static void bdw_get_cdclk(struct drm_i915_private *dev_priv,
		cdclk_state->cdclk = 675000;
}

static void bdw_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
			  const struct intel_cdclk_state *cdclk_state)
{
	int cdclk = cdclk_state->cdclk;
	uint32_t val, data;
	int ret;

@@ -888,8 +894,10 @@ static void skl_dpll0_disable(struct drm_i915_private *dev_priv)
}

static void skl_set_cdclk(struct drm_i915_private *dev_priv,
			  int cdclk, int vco)
			  const struct intel_cdclk_state *cdclk_state)
{
	int cdclk = cdclk_state->cdclk;
	int vco = cdclk_state->vco;
	u32 freq_select, pcu_ack;
	int ret;

@@ -1003,7 +1011,7 @@ static void skl_sanitize_cdclk(struct drm_i915_private *dev_priv)
 */
void skl_init_cdclk(struct drm_i915_private *dev_priv)
{
	int cdclk, vco;
	struct intel_cdclk_state cdclk_state;

	skl_sanitize_cdclk(dev_priv);

@@ -1019,12 +1027,14 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv)
		return;
	}

	vco = dev_priv->skl_preferred_vco_freq;
	if (vco == 0)
		vco = 8100000;
	cdclk = skl_calc_cdclk(0, vco);
	cdclk_state = dev_priv->cdclk.hw;

	skl_set_cdclk(dev_priv, cdclk, vco);
	cdclk_state.vco = dev_priv->skl_preferred_vco_freq;
	if (cdclk_state.vco == 0)
		cdclk_state.vco = 8100000;
	cdclk_state.cdclk = skl_calc_cdclk(0, cdclk_state.vco);

	skl_set_cdclk(dev_priv, &cdclk_state);
}

/**
@@ -1036,7 +1046,12 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv)
 */
void skl_uninit_cdclk(struct drm_i915_private *dev_priv)
{
	skl_set_cdclk(dev_priv, dev_priv->cdclk.hw.ref, 0);
	struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;

	cdclk_state.cdclk = cdclk_state.ref;
	cdclk_state.vco = 0;

	skl_set_cdclk(dev_priv, &cdclk_state);
}

static int bxt_calc_cdclk(int max_pixclk)
@@ -1200,8 +1215,10 @@ static void bxt_de_pll_enable(struct drm_i915_private *dev_priv, int vco)
}

static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
			  int cdclk, int vco)
			  const struct intel_cdclk_state *cdclk_state)
{
	int cdclk = cdclk_state->cdclk;
	int vco = cdclk_state->vco;
	u32 val, divider;
	int ret;

@@ -1336,7 +1353,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
 */
void bxt_init_cdclk(struct drm_i915_private *dev_priv)
{
	int cdclk, vco;
	struct intel_cdclk_state cdclk_state;

	bxt_sanitize_cdclk(dev_priv);

@@ -1344,20 +1361,22 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
	    dev_priv->cdclk.hw.vco != 0)
		return;

	cdclk_state = dev_priv->cdclk.hw;

	/*
	 * FIXME:
	 * - The initial CDCLK needs to be read from VBT.
	 *   Need to make this change after VBT has changes for BXT.
	 */
	if (IS_GEMINILAKE(dev_priv)) {
		cdclk = glk_calc_cdclk(0);
		vco = glk_de_pll_vco(dev_priv, cdclk);
		cdclk_state.cdclk = glk_calc_cdclk(0);
		cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);
	} else {
		cdclk = bxt_calc_cdclk(0);
		vco = bxt_de_pll_vco(dev_priv, cdclk);
		cdclk_state.cdclk = bxt_calc_cdclk(0);
		cdclk_state.vco = bxt_de_pll_vco(dev_priv, cdclk_state.cdclk);
	}

	bxt_set_cdclk(dev_priv, cdclk, vco);
	bxt_set_cdclk(dev_priv, &cdclk_state);
}

/**
@@ -1369,7 +1388,12 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
 */
void bxt_uninit_cdclk(struct drm_i915_private *dev_priv)
{
	bxt_set_cdclk(dev_priv, dev_priv->cdclk.hw.ref, 0);
	struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;

	cdclk_state.cdclk = cdclk_state.ref;
	cdclk_state.vco = 0;

	bxt_set_cdclk(dev_priv, &cdclk_state);
}

/**
@@ -1483,7 +1507,6 @@ static int vlv_modeset_calc_cdclk(struct drm_atomic_state *state)
static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state)
{
	struct drm_i915_private *dev_priv = to_i915(old_state->dev);
	unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;

	/*
	 * FIXME: We can end up here with all power domains off, yet
@@ -1497,9 +1520,9 @@ static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state)
	intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);

	if (IS_CHERRYVIEW(dev_priv))
		chv_set_cdclk(dev_priv, req_cdclk);
		chv_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
	else
		vlv_set_cdclk(dev_priv, req_cdclk);
		vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual);

	vlv_program_pfi_credits(dev_priv);

@@ -1542,9 +1565,8 @@ static int bdw_modeset_calc_cdclk(struct drm_atomic_state *state)
static void bdw_modeset_commit_cdclk(struct drm_atomic_state *old_state)
{
	struct drm_i915_private *dev_priv = to_i915(old_state->dev);
	unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;

	bdw_set_cdclk(dev_priv, req_cdclk);
	bdw_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
}

static int skl_modeset_calc_cdclk(struct drm_atomic_state *state)
@@ -1589,10 +1611,8 @@ static int skl_modeset_calc_cdclk(struct drm_atomic_state *state)
static void skl_modeset_commit_cdclk(struct drm_atomic_state *old_state)
{
	struct drm_i915_private *dev_priv = to_i915(old_state->dev);
	unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
	unsigned int req_vco = dev_priv->cdclk.actual.vco;

	skl_set_cdclk(dev_priv, req_cdclk, req_vco);
	skl_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
}

static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
@@ -1642,10 +1662,8 @@ static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
static void bxt_modeset_commit_cdclk(struct drm_atomic_state *old_state)
{
	struct drm_i915_private *dev_priv = to_i915(old_state->dev);
	unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
	unsigned int req_vco = dev_priv->cdclk.actual.vco;

	bxt_set_cdclk(dev_priv, req_cdclk, req_vco);
	bxt_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
}

static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)