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Commit 838a2ae8 authored by Shawn Guo's avatar Shawn Guo Committed by Olof Johansson
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ARM: use clockevents_config_and_register() where possible



The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register().  Use this combined configure
and register function where possible to make the codes less error prone
and gain some positive diff stat.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: default avatarAnton Vorontsov <cbouatmailru@gmail.com>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Tested-by: default avatarRoland Stigge <stigge@antcom.de>
Acked-by: default avatarEric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarBarry Song <baohua.song@csr.com>
Tested-by: default avatarStephen Warren <swarren@nvidia.com>
Acked-by: default avatarTony Prisk <linux@prisktech.co.nz>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarJason Cooper <jason@lakedaemon.net>
Reviewed-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent c35ef95c
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+2 −5
Original line number Diff line number Diff line
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
static struct clock_event_device clkevt = {
	.name		= "at91_tick",
	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
	.shift		= 32,
	.rating		= 150,
	.set_next_event	= clkevt32k_next_event,
	.set_mode	= clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
	at91_st_write(AT91_ST_RTMR, 1);

	/* Setup timer clockevent, with minimum of two ticks (important!!) */
	clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
	clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
	clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
	clkevt.cpumask = cpumask_of(0);
	clockevents_register_device(&clkevt);
	clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
					2, AT91_ST_ALMV);

	/* register clocksource */
	clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
+3 −10
Original line number Diff line number Diff line
@@ -134,7 +134,6 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,

static struct clock_event_device cns3xxx_tmr1_clockevent = {
	.name		= "cns3xxx timer1",
	.shift		= 8,
	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
	.set_mode	= cns3xxx_timer_set_mode,
	.set_next_event	= cns3xxx_timer_set_next_event,
@@ -145,15 +144,9 @@ static struct clock_event_device cns3xxx_tmr1_clockevent = {
static void __init cns3xxx_clockevents_init(unsigned int timer_irq)
{
	cns3xxx_tmr1_clockevent.irq = timer_irq;
	cns3xxx_tmr1_clockevent.mult =
		div_sc((cns3xxx_cpu_clock() >> 3) * 1000000, NSEC_PER_SEC,
		       cns3xxx_tmr1_clockevent.shift);
	cns3xxx_tmr1_clockevent.max_delta_ns =
		clockevent_delta2ns(0xffffffff, &cns3xxx_tmr1_clockevent);
	cns3xxx_tmr1_clockevent.min_delta_ns =
		clockevent_delta2ns(0xf, &cns3xxx_tmr1_clockevent);

	clockevents_register_device(&cns3xxx_tmr1_clockevent);
	clockevents_config_and_register(&cns3xxx_tmr1_clockevent,
					(cns3xxx_cpu_clock() >> 3) * 1000000,
					0xf, 0xffffffff);
}

/*
+4 −14
Original line number Diff line number Diff line
@@ -255,13 +255,9 @@ static struct irqaction mct_comp_event_irq = {

static void exynos4_clockevent_init(void)
{
	clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5);
	mct_comp_device.max_delta_ns =
		clockevent_delta2ns(0xffffffff, &mct_comp_device);
	mct_comp_device.min_delta_ns =
		clockevent_delta2ns(0xf, &mct_comp_device);
	mct_comp_device.cpumask = cpumask_of(0);
	clockevents_register_device(&mct_comp_device);
	clockevents_config_and_register(&mct_comp_device, clk_rate,
					0xf, 0xffffffff);

	if (soc_is_exynos5250())
		setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
@@ -404,14 +400,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
	evt->set_mode = exynos4_tick_set_mode;
	evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
	evt->rating = 450;

	clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5);
	evt->max_delta_ns =
		clockevent_delta2ns(0x7fffffff, evt);
	evt->min_delta_ns =
		clockevent_delta2ns(0xf, evt);

	clockevents_register_device(evt);
	clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
					0xf, 0x7fffffff);

	exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);

+1 −5
Original line number Diff line number Diff line
@@ -101,12 +101,8 @@ static void __init footbridge_timer_init(void)

	setup_irq(ce->irq, &footbridge_timer_irq);

	clockevents_calc_mult_shift(ce, mem_fclk_21285, 5);
	ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce);
	ce->min_delta_ns = clockevent_delta2ns(0x000004, ce);
	ce->cpumask = cpumask_of(smp_processor_id());

	clockevents_register_device(ce);
	clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff);
}

struct sys_timer footbridge_timer = {
+3 −12
Original line number Diff line number Diff line
@@ -178,7 +178,6 @@ static struct irqaction epit_timer_irq = {
static struct clock_event_device clockevent_epit = {
	.name		= "epit",
	.features	= CLOCK_EVT_FEAT_ONESHOT,
	.shift		= 32,
	.set_mode	= epit_set_mode,
	.set_next_event	= epit_set_next_event,
	.rating		= 200,
@@ -186,18 +185,10 @@ static struct clock_event_device clockevent_epit = {

static int __init epit_clockevent_init(struct clk *timer_clk)
{
	unsigned int c = clk_get_rate(timer_clk);

	clockevent_epit.mult = div_sc(c, NSEC_PER_SEC,
					clockevent_epit.shift);
	clockevent_epit.max_delta_ns =
			clockevent_delta2ns(0xfffffffe, &clockevent_epit);
	clockevent_epit.min_delta_ns =
			clockevent_delta2ns(0x800, &clockevent_epit);

	clockevent_epit.cpumask = cpumask_of(0);

	clockevents_register_device(&clockevent_epit);
	clockevents_config_and_register(&clockevent_epit,
					clk_get_rate(timer_clk),
					0x800, 0xfffffffe);

	return 0;
}
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