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Commit 8211bd5b authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
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drm/i915/skl: Program the DDB allocation 



v2: Adapt to the planes/cursor split

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b9cec075

drivers/gpu/drm/i915/i915_reg.h

+16 −0
Original line number Diff line number Diff line
@@ -4696,6 +4696,8 @@ enum punit_power_well { 
#define _PLANE_KEYMSK_2_A			0x70298

#define _PLANE_KEYMAX_1_A			0x701a0

#define _PLANE_KEYMAX_2_A			0x702a0

#define _PLANE_BUF_CFG_1_A			0x7027c

#define _PLANE_BUF_CFG_2_A			0x7037c



#define _PLANE_CTL_1_B				0x71180

#define _PLANE_CTL_2_B				0x71280
@@ -4773,6 +4775,20 @@ enum punit_power_well { 
#define PLANE_KEYMAX(pipe, plane)	\

	_PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe))



#define _PLANE_BUF_CFG_1_B			0x7127c

#define _PLANE_BUF_CFG_2_B			0x7137c

#define _PLANE_BUF_CFG_1(pipe)	\

	_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)

#define _PLANE_BUF_CFG_2(pipe)	\

	_PIPE(pipe, _PLANE_BUF_CFG_2_A, _PLANE_BUF_CFG_2_B)

#define PLANE_BUF_CFG(pipe, plane)	\

	_PLANE(plane, _PLANE_BUF_CFG_1(pipe), _PLANE_BUF_CFG_2(pipe))



/* SKL new cursor registers */

#define _CUR_BUF_CFG_A				0x7017c

#define _CUR_BUF_CFG_B				0x7117c

#define CUR_BUF_CFG(pipe)	_PIPE(pipe, _CUR_BUF_CFG_A, _CUR_BUF_CFG_B)



/* VBIOS regs */

#define VGACNTRL		0x71400

# define VGA_DISP_DISABLE			(1 << 31)

drivers/gpu/drm/i915/intel_pm.c

+9 −0
Original line number Diff line number Diff line
@@ -3426,6 +3426,15 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, 
				I915_WRITE(PLANE_WM_TRANS(pipe, i),

						new->plane_trans[pipe][i]);

			I915_WRITE(CUR_WM_TRANS(pipe), new->cursor_trans[pipe]);



			for (i = 0; i < intel_num_planes(crtc); i++)

				I915_WRITE(PLANE_BUF_CFG(pipe, i),

					   new->ddb.plane[pipe][i].end << 16 |

					   new->ddb.plane[pipe][i].start);



			I915_WRITE(CUR_BUF_CFG(pipe),

				   new->ddb.cursor[pipe].end << 16 |

				   new->ddb.cursor[pipe].start);

		}

	}