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Commit 81cca645 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu into fixes 

Merge "mvebu fixes for v3.16 (round 3)" from Jason Cooper:

 - Fix SMP boot on 38x/375 in big endian
 - Fix operand list for pmsu on 370/XP
 - Fix coherency bus notifiers

* tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu

:
  ARM: mvebu: Fix coherency bus notifiers by using separate notifiers
  ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter
  ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents cacadb4f a728b977

arch/arm/mach-mvebu/coherency.c

+5 −1
Original line number Diff line number Diff line
@@ -292,6 +292,10 @@ static struct notifier_block mvebu_hwcc_nb = { 
	.notifier_call = mvebu_hwcc_notifier,

};



static struct notifier_block mvebu_hwcc_pci_nb = {

	.notifier_call = mvebu_hwcc_notifier,

};



static void __init armada_370_coherency_init(struct device_node *np)

{

	struct resource res;
@@ -427,7 +431,7 @@ static int __init coherency_pci_init(void) 
{

	if (coherency_available())

		bus_register_notifier(&pci_bus_type,

				       &mvebu_hwcc_nb);

				       &mvebu_hwcc_pci_nb);

	return 0;

}

arch/arm/mach-mvebu/headsmp-a9.S

+8 −1
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ 
#include <linux/linkage.h>

#include <linux/init.h>



#include <asm/assembler.h>



	__CPUINIT

#define CPU_RESUME_ADDR_REG 0xf10182d4
@@ -22,13 +24,18 @@ 
.global armada_375_smp_cpu1_enable_code_end



armada_375_smp_cpu1_enable_code_start:

	ldr     r0, [pc, #4]

ARM_BE8(setend	be)

	adr     r0, 1f

	ldr	r0, [r0]

	ldr     r1, [r0]

ARM_BE8(rev	r1, r1)

	mov     pc, r1

1:

	.word   CPU_RESUME_ADDR_REG

armada_375_smp_cpu1_enable_code_end:



ENTRY(mvebu_cortex_a9_secondary_startup)

ARM_BE8(setend	be)

	bl      v7_invalidate_l1

	b	secondary_startup

ENDPROC(mvebu_cortex_a9_secondary_startup)

arch/arm/mach-mvebu/pmsu.c

+5 −5
Original line number Diff line number Diff line
@@ -201,12 +201,12 @@ static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle) 


	/* Test the CR_C bit and set it if it was cleared */

	asm volatile(

	"mrc	p15, 0, %0, c1, c0, 0 \n\t"

	"tst	%0, #(1 << 2) \n\t"

	"orreq	%0, %0, #(1 << 2) \n\t"

	"mcreq	p15, 0, %0, c1, c0, 0 \n\t"

	"mrc	p15, 0, r0, c1, c0, 0 \n\t"

	"tst	r0, #(1 << 2) \n\t"

	"orreq	r0, r0, #(1 << 2) \n\t"

	"mcreq	p15, 0, r0, c1, c0, 0 \n\t"

	"isb	"

	: : "r" (0));

	: : : "r0");



	pr_warn("Failed to suspend the system\n");