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Commit 81a834e3 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kalle Valo
Browse files

ath9k: Add a #define for the EEPROM "eepmisc" endianness bit 



This replaces a magic number with a named #define. Additionally it
removes two "eeprom format" specific #defines for the "big endianness"
bit which are the same on all eeprom formats.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent d15697de

drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

+2 −1
Original line number Diff line number Diff line
@@ -3468,7 +3468,8 @@ static u32 ath9k_hw_ar9003_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr, 
					AR5416_OPFLAGS_N_5G_HT20));

	PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags &

					AR5416_OPFLAGS_N_5G_HT40));

	PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & 0x01));

	PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc &

				AR5416_EEPMISC_BIG_ENDIAN));

	PR_EEP("RF Silent", pBase->rfSilent);

	PR_EEP("BT option", pBase->blueToothOptions);

	PR_EEP("Device Cap", pBase->deviceCap);

drivers/net/wireless/ath/ath9k/ar9003_eeprom.h

+0 −1
Original line number Diff line number Diff line
@@ -38,7 +38,6 @@ 
#define AR9300_NUM_CTLS_2G           12

#define AR9300_NUM_BAND_EDGES_5G     8

#define AR9300_NUM_BAND_EDGES_2G     4

#define AR9300_EEPMISC_BIG_ENDIAN    0x01

#define AR9300_EEPMISC_WOW           0x02

#define AR9300_CUSTOMER_DATA_SIZE    20

drivers/net/wireless/ath/ath9k/eeprom.h

+3 −1
Original line number Diff line number Diff line
@@ -161,6 +161,9 @@ 
#define AR5416_EEP_TXGAIN_ORIGINAL         0

#define AR5416_EEP_TXGAIN_HIGH_POWER       1



/* Endianness of EEPROM content */

#define AR5416_EEPMISC_BIG_ENDIAN          0x01



#define AR5416_EEP4K_START_LOC                64

#define AR5416_EEP4K_NUM_2G_CAL_PIERS         3

#define AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS 3
@@ -191,7 +194,6 @@ 
#define AR9287_NUM_CTLS              	12

#define AR9287_NUM_BAND_EDGES        	4

#define AR9287_PD_GAIN_ICEPTS           1

#define AR9287_EEPMISC_BIG_ENDIAN       0x01

#define AR9287_EEPMISC_WOW              0x02

#define AR9287_MAX_CHAINS               2

#define AR9287_ANT_16S                  32

drivers/net/wireless/ath/ath9k/eeprom_4k.c

+1 −1
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr, 
					AR5416_OPFLAGS_N_5G_HT20));

	PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &

					AR5416_OPFLAGS_N_5G_HT40));

	PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));

	PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));

	PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);

	PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);

	PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);

drivers/net/wireless/ath/ath9k/eeprom_9287.c

+1 −1
Original line number Diff line number Diff line
@@ -150,7 +150,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr, 
					AR5416_OPFLAGS_N_5G_HT20));

	PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &

					AR5416_OPFLAGS_N_5G_HT40));

	PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));

	PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));

	PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);

	PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);

	PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);